[llvm] r176060 - Refine fix to PR10499, no functionality change

[Bill Wendling]

On Feb 25, 2013, at 3:16 PM, Michael Liao <michael.liao at intel.com> wrote:

> Author: hliao
> Date: Mon Feb 25 17:16:36 2013
> New Revision: 176060
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=176060&view=rev
> Log:
> Refine fix to PR10499, no functionality change
> 
> - Put expensive checking after simple one
> 
Ah! You caught it. :) You can ignore my previous email. Thanks!

-bw

> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> 
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=176060&r1=176059&r2=176060&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 17:16:36 2013
> @@ -5344,7 +5344,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDV
>   // Vectors containing all ones can be matched by pcmpeqd on 128-bit width
>   // vectors or broken into v4i32 operations on 256-bit vectors. AVX2 can use
>   // vpcmpeqd on 256-bit vectors.
> -  if (ISD::isBuildVectorAllOnes(Op.getNode()) && Subtarget->hasSSE2()) {
> +  if (Subtarget->hasSSE2() && ISD::isBuildVectorAllOnes(Op.getNode())) {
>     if (VT == MVT::v4i32 || (VT == MVT::v8i32 && Subtarget->hasInt256()))
>       return Op;
> 
> 
> 
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