[llvm] r176060 - Refine fix to PR10499, no functionality change

[Michael Liao]

Author: hliao
Date: Mon Feb 25 17:16:36 2013
New Revision: 176060

URL: http://llvm.org/viewvc/llvm-project?rev=176060&view=rev
Log:
Refine fix to PR10499, no functionality change

- Put expensive checking after simple one


Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=176060&r1=176059&r2=176060&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 17:16:36 2013
@@ -5344,7 +5344,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDV
   // Vectors containing all ones can be matched by pcmpeqd on 128-bit width
   // vectors or broken into v4i32 operations on 256-bit vectors. AVX2 can use
   // vpcmpeqd on 256-bit vectors.
-  if (ISD::isBuildVectorAllOnes(Op.getNode()) && Subtarget->hasSSE2()) {
+  if (Subtarget->hasSSE2() && ISD::isBuildVectorAllOnes(Op.getNode())) {
     if (VT == MVT::v4i32 || (VT == MVT::v8i32 && Subtarget->hasInt256()))
       return Op;