[llvm] r175765 - Revert r175688 - It broke a test case (see PR15320).
Chandler Carruth
chandlerc at google.com
Thu Feb 21 09:08:49 PST 2013
Thanks!
On Feb 21, 2013 9:04 AM, "Lang Hames" <lhames at gmail.com> wrote:
> Author: lhames
> Date: Thu Feb 21 11:01:59 2013
> New Revision: 175765
>
> URL: http://llvm.org/viewvc/llvm-project?rev=175765&view=rev
> Log:
> Revert r175688 - It broke a test case (see PR15320).
>
> Modified:
> llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp
>
> Modified: llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp?rev=175765&r1=175764&r2=175765&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp Thu Feb 21 11:01:59 2013
> @@ -49,6 +49,8 @@ private:
> bool LowerSubregToReg(MachineInstr *MI);
> bool LowerCopy(MachineInstr *MI);
>
> + void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
> + const TargetRegisterInfo *TRI);
> void TransferImplicitDefs(MachineInstr *MI);
> };
> } // end anonymous namespace
> @@ -59,6 +61,21 @@ char &llvm::ExpandPostRAPseudosID = Expa
> INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
> "Post-RA pseudo instruction expansion pass", false, false)
>
> +/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
> +/// and the lowered replacement instructions immediately precede it.
> +/// Mark the replacement instructions with the dead flag.
> +void
> +ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
> + const TargetRegisterInfo *TRI) {
> + for (MachineBasicBlock::iterator MII =
> + prior(MachineBasicBlock::iterator(MI)); ; --MII) {
> + if (MII->addRegisterDead(DstReg, TRI))
> + break;
> + assert(MII != MI->getParent()->begin() &&
> + "copyPhysReg output doesn't reference destination register!");
> + }
> +}
> +
> /// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
> /// replacement instructions immediately precede it. Copy any
> implicit-def
> /// operands from MI to the replacement instruction.
> @@ -111,17 +128,17 @@ bool ExpandPostRA::LowerSubregToReg(Mach
> }
> DEBUG(dbgs() << "subreg: eliminated!");
> } else {
> - if (MI->getOperand(0).isDead()) {
> - MI->setDesc(TII->get(TargetOpcode::KILL));
> - DEBUG(dbgs() << "subreg: replaced by: " << *MI);
> - return true;
> - }
> TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
> MI->getOperand(2).isKill());
> +
> // Implicitly define DstReg for subsequent uses.
> MachineBasicBlock::iterator CopyMI = MI;
> --CopyMI;
> CopyMI->addRegisterDefined(DstReg);
> +
> + // Transfer the kill/dead flags, if needed.
> + if (MI->getOperand(0).isDead())
> + TransferDeadFlag(MI, DstSubReg, TRI);
> DEBUG(dbgs() << "subreg: " << *CopyMI);
> }
>
> @@ -134,18 +151,11 @@ bool ExpandPostRA::LowerCopy(MachineInst
> MachineOperand &DstMO = MI->getOperand(0);
> MachineOperand &SrcMO = MI->getOperand(1);
>
> - if (DstMO.isDead()) {
> - DEBUG(dbgs() << "dead copy: " << *MI);
> - MI->setDesc(TII->get(TargetOpcode::KILL));
> - DEBUG(dbgs() << "replaced by: " << *MI);
> - return true;
> - }
> -
> if (SrcMO.getReg() == DstMO.getReg()) {
> DEBUG(dbgs() << "identity copy: " << *MI);
> // No need to insert an identity copy instruction, but replace with a
> KILL
> // if liveness is changed.
> - if (SrcMO.isUndef() || MI->getNumOperands() > 2) {
> + if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {
> // We must make sure the super-register gets killed. Replace the
> // instruction with KILL.
> MI->setDesc(TII->get(TargetOpcode::KILL));
> @@ -161,6 +171,8 @@ bool ExpandPostRA::LowerCopy(MachineInst
> TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
> DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
>
> + if (DstMO.isDead())
> + TransferDeadFlag(MI, DstMO.getReg(), TRI);
> if (MI->getNumOperands() > 2)
> TransferImplicitDefs(MI);
> DEBUG({
>
>
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