<p dir="ltr">Thanks!</p>
<div class="gmail_quote">On Feb 21, 2013 9:04 AM, "Lang Hames" <<a href="mailto:lhames@gmail.com">lhames@gmail.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: lhames<br>
Date: Thu Feb 21 11:01:59 2013<br>
New Revision: 175765<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=175765&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=175765&view=rev</a><br>
Log:<br>
Revert r175688 - It broke a test case (see PR15320).<br>
<br>
Modified:<br>
llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp<br>
<br>
Modified: llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp?rev=175765&r1=175764&r2=175765&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp?rev=175765&r1=175764&r2=175765&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp Thu Feb 21 11:01:59 2013<br>
@@ -49,6 +49,8 @@ private:<br>
bool LowerSubregToReg(MachineInstr *MI);<br>
bool LowerCopy(MachineInstr *MI);<br>
<br>
+ void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,<br>
+ const TargetRegisterInfo *TRI);<br>
void TransferImplicitDefs(MachineInstr *MI);<br>
};<br>
} // end anonymous namespace<br>
@@ -59,6 +61,21 @@ char &llvm::ExpandPostRAPseudosID = Expa<br>
INITIALIZE_PASS(ExpandPostRA, "postrapseudos",<br>
"Post-RA pseudo instruction expansion pass", false, false)<br>
<br>
+/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,<br>
+/// and the lowered replacement instructions immediately precede it.<br>
+/// Mark the replacement instructions with the dead flag.<br>
+void<br>
+ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg,<br>
+ const TargetRegisterInfo *TRI) {<br>
+ for (MachineBasicBlock::iterator MII =<br>
+ prior(MachineBasicBlock::iterator(MI)); ; --MII) {<br>
+ if (MII->addRegisterDead(DstReg, TRI))<br>
+ break;<br>
+ assert(MII != MI->getParent()->begin() &&<br>
+ "copyPhysReg output doesn't reference destination register!");<br>
+ }<br>
+}<br>
+<br>
/// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered<br>
/// replacement instructions immediately precede it. Copy any implicit-def<br>
/// operands from MI to the replacement instruction.<br>
@@ -111,17 +128,17 @@ bool ExpandPostRA::LowerSubregToReg(Mach<br>
}<br>
DEBUG(dbgs() << "subreg: eliminated!");<br>
} else {<br>
- if (MI->getOperand(0).isDead()) {<br>
- MI->setDesc(TII->get(TargetOpcode::KILL));<br>
- DEBUG(dbgs() << "subreg: replaced by: " << *MI);<br>
- return true;<br>
- }<br>
TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,<br>
MI->getOperand(2).isKill());<br>
+<br>
// Implicitly define DstReg for subsequent uses.<br>
MachineBasicBlock::iterator CopyMI = MI;<br>
--CopyMI;<br>
CopyMI->addRegisterDefined(DstReg);<br>
+<br>
+ // Transfer the kill/dead flags, if needed.<br>
+ if (MI->getOperand(0).isDead())<br>
+ TransferDeadFlag(MI, DstSubReg, TRI);<br>
DEBUG(dbgs() << "subreg: " << *CopyMI);<br>
}<br>
<br>
@@ -134,18 +151,11 @@ bool ExpandPostRA::LowerCopy(MachineInst<br>
MachineOperand &DstMO = MI->getOperand(0);<br>
MachineOperand &SrcMO = MI->getOperand(1);<br>
<br>
- if (DstMO.isDead()) {<br>
- DEBUG(dbgs() << "dead copy: " << *MI);<br>
- MI->setDesc(TII->get(TargetOpcode::KILL));<br>
- DEBUG(dbgs() << "replaced by: " << *MI);<br>
- return true;<br>
- }<br>
-<br>
if (SrcMO.getReg() == DstMO.getReg()) {<br>
DEBUG(dbgs() << "identity copy: " << *MI);<br>
// No need to insert an identity copy instruction, but replace with a KILL<br>
// if liveness is changed.<br>
- if (SrcMO.isUndef() || MI->getNumOperands() > 2) {<br>
+ if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {<br>
// We must make sure the super-register gets killed. Replace the<br>
// instruction with KILL.<br>
MI->setDesc(TII->get(TargetOpcode::KILL));<br>
@@ -161,6 +171,8 @@ bool ExpandPostRA::LowerCopy(MachineInst<br>
TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),<br>
DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());<br>
<br>
+ if (DstMO.isDead())<br>
+ TransferDeadFlag(MI, DstMO.getReg(), TRI);<br>
if (MI->getNumOperands() > 2)<br>
TransferImplicitDefs(MI);<br>
DEBUG({<br>
<br>
<br>
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</blockquote></div>