[llvm-commits] [PATCH] ARM: Add vaddl/vsubl intrinsics
Pete Couperus
pjcoup at gmail.com
Tue Dec 18 20:46:16 PST 2012
Hi Tim, Renato,
Thank you both for taking a look.
On Tue, Dec 18, 2012 at 3:27 PM, Tim Northover <t.p.northover at gmail.com> wrote:
>> +def : Pat<(v4i32 (NEONvaddlu (v4i16 DPR:$src1), (v4i16 DPR:$src2))),
>> + (v4i32 (VADDLuv4i32 (v4i16 DPR:$src1), (v4i16 DPR:$src2)))>;
>> +def : Pat<(v8i16 (NEONvaddlu (v8i8 DPR:$src1), (v8i8 DPR:$src2))),
>> + (v8i16 (VADDLuv8i16 (v8i8 DPR:$src1), (v8i8 DPR:$src2)))>;
>> +def : Pat<(v2i64 (NEONvaddlu (v2i32 DPR:$src1), (v2i32 DPR:$src2))),
>> + (v2i64 (VADDLuv2i64 (v2i32 DPR:$src1), (v2i32 DPR:$src2)))>;
>>
>> I'm not a tablegen expert, but I think there's a better way of doing
>> this... Tim, can you comment on that?
>
> The type annotations seem a little extravagant (you should be able to
> specify vNiM just once for input and possibly output if SDTARMVMULL is
> defined appropriately), but I think the three patterns are necessary.
> TableGen needs any pattern to have well-defined types, I believe. It
> can't just instantiate a pattern over all sane types.
>
> In summary: the quibbles I do have here could well come down to style
> rather than objective reality.
>
> Tim.
Renato, I agree, it would probably be better to have a name other than
SDTARMVMULL, as there are many instructions fitting this category.
Perhaps SDTARMVLONG2 (for NEON Long 2 input argument instructions)?
Tim, you're right it looks like I can drop the vNiM in the output
pattern (i.e., (v4i32 DPR:$src1) -> DPR:$src1).
I'll modify this, and resubmit with a better name.
Thanks again.
Pete
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