[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Weiming Zhao]

Yes, I tried to follow the similar approach in this patch.

But ldrexd/strexd intrinsic are handled differently: they are lowered by
directly emitting MIs and also creates VRs directly:

 

unsigned GPRPair0 = MRI.createVirtualRegister(&ARM::GPRPairRegClass);

.

BuildMI(BB, dl, TII->get(TargetOpcode::COPY), destlo) .addReg(GPRPair0, 0,
ARM::gsub_0);

BuildMI(BB, dl, TII->get(TargetOpcode::COPY), desthi) .addReg(GPRPair0, 0,
ARM::gsub_1);

 

So for InlineASM DAG, I also tried to create a VR first. The order of VR
creation  should be handled by glue edges.

 

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation

 

From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] 
Sent: Tuesday, December 04, 2012 2:43 PM
To: weimingz at codeaurora.org; Zhao
Cc: Evan Cheng; llvm-commits at cs.uiuc.edu; grosbach at apple.com
Subject: Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm
with 64-bit data on ARM

 

 

On Dec 4, 2012, at 2:36 PM, "Weiming Zhao" <weimingz at codeaurora.org> wrote:





Hi Jakob,

 

Thanks for your reviewing.

Are you suggesting to first fix the DAG framework to let it support untyped
nodes, and then in ARM inline asm, we use copyToReg/CopyFromReg instead of
creating virtual regs?

 

No, I mean the DAG for an inline asm that reads or writes a GPRPair should
look like the one you already made for ldrexd/strexd.

 

/jakob

 

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