[llvm-commits] [llvm] r168029 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Craig Topper]

My primary goal was to keep instruction selection from failing. Without the
change I made, FABS of v4f32 just didn't match anything and failed. Someone
familiar with ARM could maybe do something better.

On Thu, Nov 15, 2012 at 9:52 AM, David Peixotto <dpeixott at codeaurora.org>wrote:

> Hi Craig,
>
> I see the change was reverted for FNEG, but what about FABS? Why does FABS
> need to be marked as expand here? There is a VABS.f32 instruction that
> operates on Q registers that should work for a v4f32 type. Will that
> instruction be generated when it is marked expand?
>
> Thanks,
> David
>
> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted
> by The Linux Foundation
>
>
> > -----Original Message-----
> > From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> > bounces at cs.uiuc.edu] On Behalf Of Craig Topper
> > Sent: Thursday, November 15, 2012 12:06 AM
> > To: llvm-commits at cs.uiuc.edu
> > Subject: [llvm-commits] [llvm] r168029 -
> > /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> >
> > Author: ctopper
> > Date: Thu Nov 15 02:06:12 2012
> > New Revision: 168029
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=168029&view=rev
> > Log:
> > Make FNEG and FABS of v4f32 Expand.
> >
> > Modified:
> >     llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> >
> > Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> > URL: http://llvm.org/viewvc/llvm-
> > project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=168029&r1=1
> > 68028&r2=168029&view=diff
> > ==========================================================
> > ====================
> > --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> > +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 15 02:06:12
> > 2012
> > @@ -505,6 +505,8 @@
> >      setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand);
> >      setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand);
> >
> > +    setOperationAction(ISD::FNEG, MVT::v4f32, Expand);
> > +    setOperationAction(ISD::FABS, MVT::v4f32, Expand);
> >      setOperationAction(ISD::FSQRT, MVT::v4f32, Expand);
> >      setOperationAction(ISD::FSIN, MVT::v4f32, Expand);
> >      setOperationAction(ISD::FCOS, MVT::v4f32, Expand);
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>


-- 
~Craig
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20121115/374ec8cd/attachment.html>