[llvm-commits] [llvm] r166852 - in /llvm/trunk: lib/Target/Mips/Mips16InstrInfo.td test/CodeGen/Mips/tls16_2.ll

[Reed Kotler]

Author: rkotler
Date: Fri Oct 26 19:57:14 2012
New Revision: 166852

URL: http://llvm.org/viewvc/llvm-project?rev=166852&view=rev
Log:
Implement MipsHi for mips16


Added:
    llvm/trunk/test/CodeGen/Mips/tls16_2.ll
Modified:
    llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=166852&r1=166851&r2=166852&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Fri Oct 26 19:57:14 2012
@@ -1437,6 +1437,14 @@
 
 def: SetCC_I16<setult, immSExt16, SltiuCCRxImmX16>;
 
+def: Mips16Pat<(add CPU16Regs:$hi, (MipsLo tglobaladdr:$lo)),
+               (AddiuRxRxImmX16 CPU16Regs:$hi, tglobaladdr:$lo)>;
+
+// hi/lo relocs
+
+def : Mips16Pat<(MipsHi tglobaltlsaddr:$in), 
+                (SllX16 (LiRxImmX16 tglobaltlsaddr:$in), 16)>;
+
 // wrapper_pic
 class Wrapper16Pat<SDNode node, Instruction ADDiuOp, RegisterClass RC>:
   Mips16Pat<(MipsWrapper RC:$gp, node:$in),
@@ -1445,5 +1453,3 @@
 
 def : Wrapper16Pat<tglobaltlsaddr, AddiuRxRxImmX16, CPU16Regs>;
 
-def: Mips16Pat<(add CPU16Regs:$hi, (MipsLo tglobaladdr:$lo)),
-               (AddiuRxRxImmX16 CPU16Regs:$hi, tglobaladdr:$lo)>;

Added: llvm/trunk/test/CodeGen/Mips/tls16_2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/tls16_2.ll?rev=166852&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/tls16_2.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/tls16_2.ll Fri Oct 26 19:57:14 2012
@@ -0,0 +1,15 @@
+; RUN: llc  -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16
+
+ at f.i = internal thread_local unnamed_addr global i32 1, align 4
+
+define i8* @f(i8* nocapture %a) nounwind {
+entry:
+  %0 = load i32* @f.i, align 4
+  %inc = add nsw i32 %0, 1
+  store i32 %inc, i32* @f.i, align 4
+  %1 = inttoptr i32 %inc to i8*
+; PIC16: addiu	${{[0-9]+}}, %tlsldm(f.i)
+  ret i8* %1
+}
+
+