[llvm-commits] [llvm] r163298 - in /llvm/trunk: lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMInstrNEON.td test/CodeGen/ARM/integer_insertelement.ll test/CodeGen/ARM/vget_lane.ll

[Jakob Stoklund Olesen]

On Sep 6, 2012, at 2:16 AM, James Molloy <james.molloy at arm.com> wrote:

> Author: jamesm
> Date: Thu Sep  6 04:16:01 2012
> New Revision: 163298
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=163298&view=rev
> Log:
> Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
> 
> 
> Added:
>    llvm/trunk/test/CodeGen/ARM/integer_insertelement.ll
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
>    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
>    llvm/trunk/test/CodeGen/ARM/vget_lane.ll

Hi James,

I reverted this patch (but left the test case) because the new coalescer should be able to handle these lane insertions.

Let me know if there are missing cases.

/jakob