[llvm-commits] [llvm] r166665 - /llvm/trunk/lib/Target/X86/X86.td

[Chandler Carruth]

On Thu, Oct 25, 2012 at 12:06 AM, Michael Liao <michael.liao at intel.com> wrote:
> Author: hliao
> Date: Thu Oct 25 02:06:48 2012
> New Revision: 166665
>
> URL: http://llvm.org/viewvc/llvm-project?rev=166665&view=rev
> Log:
> Atom has SIMD instruction set extension up to SSSE3

Test case please.

>
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86.td
>
> Modified: llvm/trunk/lib/Target/X86/X86.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=166665&r1=166664&r2=166665&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86.td (original)
> +++ llvm/trunk/lib/Target/X86/X86.td Thu Oct 25 02:06:48 2012
> @@ -162,7 +162,7 @@
>                                 FeatureSlowBTMem]>;
>  def : Proc<"penryn",          [FeatureSSE41, FeatureCMPXCHG16B,
>                                 FeatureSlowBTMem]>;
> -def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSE3, FeatureCMPXCHG16B,
> +def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSSE3, FeatureCMPXCHG16B,
>                                 FeatureMOVBE, FeatureSlowBTMem, FeatureLeaForSP,
>                                 FeatureSlowDivide]>;
>  // "Arrandale" along with corei3 and corei5
>
>
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