[llvm-commits] [llvm] r166665 - /llvm/trunk/lib/Target/X86/X86.td

Michael Liao michael.liao at intel.com
Thu Oct 25 00:06:48 PDT 2012


Author: hliao
Date: Thu Oct 25 02:06:48 2012
New Revision: 166665

URL: http://llvm.org/viewvc/llvm-project?rev=166665&view=rev
Log:
Atom has SIMD instruction set extension up to SSSE3


Modified:
    llvm/trunk/lib/Target/X86/X86.td

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=166665&r1=166664&r2=166665&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Thu Oct 25 02:06:48 2012
@@ -162,7 +162,7 @@
                                FeatureSlowBTMem]>;
 def : Proc<"penryn",          [FeatureSSE41, FeatureCMPXCHG16B,
                                FeatureSlowBTMem]>;
-def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSE3, FeatureCMPXCHG16B,
+def : AtomProc<"atom",        [ProcIntelAtom, FeatureSSSE3, FeatureCMPXCHG16B,
                                FeatureMOVBE, FeatureSlowBTMem, FeatureLeaForSP,
                                FeatureSlowDivide]>;
 // "Arrandale" along with corei3 and corei5





More information about the llvm-commits mailing list