[llvm-commits] [PATCH] Remove redundant register copies when inserting to Q registers on ARM

[Jakob Stoklund Olesen]

On Sep 5, 2012, at 1:03 AM, James Molloy <james.molloy at arm.com> wrote:

> Hi Jakob, Anton,
> 
> Thanks for the comments; I've integrated them and attach a new patch
> that should address them.

Looks good, except:

+        DLane = QLane & 7;                                   // QLane % 8
+        DSubReg  = (QLane >> 3) ? ARM::dsub_1 : ARM::dsub_0; // QLane / 8

If '% 8' and '/ 8' best express what you're doing, just write that.

Thanks,
/jakob