[llvm-commits] [PATCH] Remove redundant register copies when inserting to Q registers on ARM

[James Molloy]

Hi Jakob, Anton,

Thanks for the comments; I've integrated them and attach a new patch
that should address them.

Cheers,

James

On Tue, 2012-09-04 at 17:35 +0100, Jakob Stoklund Olesen wrote:
> On Sep 4, 2012, at 9:31 AM, James Molloy <James.Molloy at arm.com> wrote:
>
> > Hi Jakob,
> >
> > +      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
> > +                                     ((QLane >> LaneShift) &
> > LaneMask));
> >
> > You're quite right; This should be:
> >
> > +      unsigned DReg = TRI->getSubReg(QReg, ARM::dsub_0 +
> > +                                     ((QLane >> LaneShift) & 1));
> >
> > LaneMask is a mask to get the right lane number (either 0..1 or 0..3)
> > but the DPR it applies to is always in the range 0..1.
> >
> > I'll add some more comments hopefully tomorrow (I'm in training, so not
> > at my PC) in addition to correcting this if you wish?
>
> Yes, please.
>
> Add some comments explaining the range and meaning of the immediates and lane numbers etc. That way, a bug like the one above should become obvious to anyone reading the code.
>
> Thanks,
> /jakob
>
>
>


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