[llvm-commits] [llvm] r160543 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Craig Topper
craig.topper at gmail.com
Fri Jul 20 00:03:46 PDT 2012
Author: ctopper
Date: Fri Jul 20 02:03:46 2012
New Revision: 160543
URL: http://llvm.org/viewvc/llvm-project?rev=160543&view=rev
Log:
Don't use implicit register operands to calculate L-bit for AVX instructions. Needed because super reg defs and kills are added as implicit operands on 128-bit instructions. Fixes PR13349. Patch by Jose Fonseca.
Modified:
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=160543&r1=160542&r2=160543&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Fri Jul 20 02:03:46 2012
@@ -927,6 +927,8 @@
for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
if (!MI.getOperand(i).isReg())
continue;
+ if (MI.getOperand(i).isImplicit())
+ continue;
unsigned SrcReg = MI.getOperand(i).getReg();
if (SrcReg >= X86::YMM0 && SrcReg <= X86::YMM15)
VEX_L = 1;
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