[llvm-commits] [llvm] r160540 - /llvm/trunk/include/llvm/Target/Target.td

[Owen Anderson]

Author: resistor
Date: Thu Jul 19 22:38:19 2012
New Revision: 160540

URL: http://llvm.org/viewvc/llvm-project?rev=160540&view=rev
Log:
Make RegisterOperand a subclass of DAGOperand so that RegisterOperands can be passed into multiclasses that take DAGOperands as multiclass parameters.

Modified:
    llvm/trunk/include/llvm/Target/Target.td

Modified: llvm/trunk/include/llvm/Target/Target.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=160540&r1=160539&r2=160540&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/Target.td (original)
+++ llvm/trunk/include/llvm/Target/Target.td Thu Jul 19 22:38:19 2012
@@ -564,7 +564,8 @@
   AsmOperandClass ParserMatchClass = ImmAsmOperand;
 }
 
-class RegisterOperand<RegisterClass regclass, string pm = "printOperand"> {
+class RegisterOperand<RegisterClass regclass, string pm = "printOperand">
+  : DAGOperand {
   // RegClass - The register class of the operand.
   RegisterClass RegClass = regclass;
   // PrintMethod - The target method to call to print register operands of