[llvm-commits] [llvm] r159610 - in /llvm/trunk: lib/Target/Mips/MipsISelLowering.cpp test/CodeGen/Mips/inlineasm-operand-code.ll

[Chandler Carruth]

On Mon, Jul 2, 2012 at 3:39 PM, Jack Carter <jcarter at mips.com> wrote:

> Author: jacksprat
> Date: Mon Jul  2 17:39:45 2012
> New Revision: 159610
>
> URL: http://llvm.org/viewvc/llvm-project?rev=159610&view=rev
> Log:
>     mips32 long long register inline asm constraint support.
>
>     inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was
> removed.    This resulted in the removal of a negative test
> (inlineasm-cnstrnt-bad-r-1.ll)
>

I don't see this file actually removed with this commit, and it is now
failing for me.


>
>
> Modified:
>     llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>     llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll
>
> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=159610&r1=159609&r2=159610&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Jul  2 17:39:45
> 2012
> @@ -3355,6 +3355,8 @@
>      case 'r':
>        if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
>          return std::make_pair(0U, &Mips::CPURegsRegClass);
> +      if (VT == MVT::i64 && !HasMips64)
> +        return std::make_pair(0U, &Mips::CPURegsRegClass);
>        if (VT == MVT::i64 && HasMips64)
>          return std::make_pair(0U, &Mips::CPU64RegsRegClass);
>        // This will generate an error message
>
> Modified: llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll?rev=159610&r1=159609&r2=159610&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll (original)
> +++ llvm/trunk/test/CodeGen/Mips/inlineasm-operand-code.ll Mon Jul  2
> 17:39:45 2012
> @@ -41,5 +41,11 @@
>  ;CHECK:        #NO_APP
>    tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32
> 0) nounwind
>
> +; a long long in 32 bit mode (use to assert)
> +;CHECK:        #APP
> +;CHECK:        addi ${{[0-9]+}},${{[0-9]+}},3
> +;CHECK:        #NO_APP
> +  tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64
> 1229801703532086340, i64 3) nounwind
> +
>    ret i32 0
>  }
>
>
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