[llvm-commits] [llvm] r159162 - /llvm/trunk/include/llvm/Target/Target.td
Tom Stellard
thomas.stellard at amd.com
Mon Jun 25 14:33:42 PDT 2012
On Mon, Jun 25, 2012 at 09:25:16PM +0000, Owen Anderson wrote:
> Author: resistor
> Date: Mon Jun 25 16:25:16 2012
> New Revision: 159162
>
> URL: http://llvm.org/viewvc/llvm-project?rev=159162&view=rev
> Log:
> Define DAGOperand, an empty base class for RegisterClass and Operand. This allows one to write multiclasses that are polymorphic over both registers and non-register operands.
>
> Modified:
> llvm/trunk/include/llvm/Target/Target.td
>
> Modified: llvm/trunk/include/llvm/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=159162&r1=159161&r2=159162&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/Target.td (original)
> +++ llvm/trunk/include/llvm/Target/Target.td Mon Jun 25 16:25:16 2012
> @@ -111,13 +111,20 @@
> let SubRegs = subregs;
> }
>
> +// DAGOperand - An empty base class that unifies RegisterClass's and other forms
> +// of Operand's that are legal as type qualifiers in DAG patterns. This should
> +// only ever be used for defining multiclasses that are polymorphic over both
> +// RegisterClass's and other Operand's.
> +class DAGOperand { }
> +
> // RegisterClass - Now that all of the registers are defined, and aliases
> // between registers are defined, specify which registers belong to which
> // register classes. This also defines the default allocation order of
> // registers by register allocators.
> //
> class RegisterClass<string namespace, list<ValueType> regTypes, int alignment,
> - dag regList, RegAltNameIndex idx = NoRegAltName> {
> + dag regList, RegAltNameIndex idx = NoRegAltName>
> + : DAGOperand {
> string Namespace = namespace;
>
> // RegType - Specify the list ValueType of the registers in this register
> @@ -537,7 +544,7 @@
> /// Operand Types - These provide the built-in operand types that may be used
> /// by a target. Targets can optionally provide their own operand types as
> /// needed, though this should not be needed for RISC targets.
> -class Operand<ValueType ty> {
> +class Operand<ValueType ty> : DAGOperand {
> ValueType Type = ty;
> string PrintMethod = "printOperand";
> string EncoderMethod = "";
>
>
Do you have a simple tablegen example that uses this new class? It seems
useful, but I don't quite understand how it is supposed to be used.
Thanks,
Tom
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