[llvm-commits] [llvm] r157446 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/bigstructret.ll
NAKAMURA Takumi
geek4civic at gmail.com
Fri May 25 00:08:03 PDT 2012
It seems the added test would be win32-incompatible...
2012/05/25 9:11 "Eli Friedman" <eli.friedman at gmail.com>:
> Author: efriedma
> Date: Thu May 24 19:09:29 2012
> New Revision: 157446
>
> URL: http://llvm.org/viewvc/llvm-project?rev=157446&view=rev
> Log:
> Simplify code for calling a function where CanLowerReturn fails, fixing a
> small bug in the process.
>
>
> Modified:
> llvm/trunk/include/llvm/Target/TargetLowering.h
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
> llvm/trunk/lib/Target/X86/X86FastISel.cpp
> llvm/trunk/test/CodeGen/X86/bigstructret.ll
>
> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=157446&r1=157445&r2=157446&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Thu May 24 19:09:29
> 2012
> @@ -2049,8 +2049,7 @@
> /// the offsets, if the return value is being lowered to memory.
> void GetReturnInfo(Type* ReturnType, Attributes attr,
> SmallVectorImpl<ISD::OutputArg> &Outs,
> - const TargetLowering &TLI,
> - SmallVectorImpl<uint64_t> *Offsets = 0);
> + const TargetLowering &TLI);
>
> } // end llvm namespace
>
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=157446&r1=157445&r2=157446&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu May 24
> 19:09:29 2012
> @@ -5149,9 +5149,8 @@
>
> // Check whether the function can return without sret-demotion.
> SmallVector<ISD::OutputArg, 4> Outs;
> - SmallVector<uint64_t, 4> Offsets;
> GetReturnInfo(RetTy, CS.getAttributes().getRetAttributes(),
> - Outs, TLI, &Offsets);
> + Outs, TLI);
>
> bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),
> DAG.getMachineFunction(),
> @@ -5264,7 +5263,13 @@
> ComputeValueVTs(TLI, PtrRetTy, PVTs);
> assert(PVTs.size() == 1 && "Pointers should fit in one register");
> EVT PtrVT = PVTs[0];
> - unsigned NumValues = Outs.size();
> +
> + SmallVector<EVT, 4> RetTys;
> + SmallVector<uint64_t, 4> Offsets;
> + RetTy = FTy->getReturnType();
> + ComputeValueVTs(TLI, RetTy, RetTys, &Offsets);
> +
> + unsigned NumValues = RetTys.size();
> SmallVector<SDValue, 4> Values(NumValues);
> SmallVector<SDValue, 4> Chains(NumValues);
>
> @@ -5272,8 +5277,7 @@
> SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT,
> DemoteStackSlot,
> DAG.getConstant(Offsets[i], PtrVT));
> - SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,
> - Add,
> + SDValue L = DAG.getLoad(RetTys[i], getCurDebugLoc(), Result.second,
> Add,
> MachinePointerInfo::getFixedStack(DemoteStackIdx,
> Offsets[i]),
> false, false, false, 1);
> Values[i] = L;
> @@ -5284,30 +5288,10 @@
> MVT::Other, &Chains[0], NumValues);
> PendingLoads.push_back(Chain);
>
> - // Collect the legal value parts into potentially illegal values
> - // that correspond to the original function's return values.
> - SmallVector<EVT, 4> RetTys;
> - RetTy = FTy->getReturnType();
> - ComputeValueVTs(TLI, RetTy, RetTys);
> - ISD::NodeType AssertOp = ISD::DELETED_NODE;
> - SmallVector<SDValue, 4> ReturnValues;
> - unsigned CurReg = 0;
> - for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {
> - EVT VT = RetTys[I];
> - EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT);
> - unsigned NumRegs = TLI.getNumRegisters(RetTy->getContext(), VT);
> -
> - SDValue ReturnValue =
> - getCopyFromParts(DAG, getCurDebugLoc(), &Values[CurReg], NumRegs,
> - RegisterVT, VT, AssertOp);
> - ReturnValues.push_back(ReturnValue);
> - CurReg += NumRegs;
> - }
> -
> setValue(CS.getInstruction(),
> DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
> DAG.getVTList(&RetTys[0], RetTys.size()),
> - &ReturnValues[0], ReturnValues.size()));
> + &Values[0], Values.size()));
> }
>
> // Assign order to nodes here. If the call does not produce a result, it
> won't
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=157446&r1=157445&r2=157446&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu May 24
> 19:09:29 2012
> @@ -997,13 +997,11 @@
> /// TODO: Move this out of TargetLowering.cpp.
> void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
> SmallVectorImpl<ISD::OutputArg> &Outs,
> - const TargetLowering &TLI,
> - SmallVectorImpl<uint64_t> *Offsets) {
> + const TargetLowering &TLI) {
> SmallVector<EVT, 4> ValueVTs;
> ComputeValueVTs(TLI, ReturnType, ValueVTs);
> unsigned NumValues = ValueVTs.size();
> if (NumValues == 0) return;
> - unsigned Offset = 0;
>
> for (unsigned j = 0, f = NumValues; j != f; ++j) {
> EVT VT = ValueVTs[j];
> @@ -1026,8 +1024,6 @@
>
> unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
> EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
> - unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(
> - PartVT.getTypeForEVT(ReturnType->getContext()));
>
> // 'inreg' on function refers to return value
> ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
> @@ -1042,10 +1038,6 @@
>
> for (unsigned i = 0; i < NumParts; ++i) {
> Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true));
> - if (Offsets) {
> - Offsets->push_back(Offset);
> - Offset += PartSize;
> - }
> }
> }
> }
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=157446&r1=157445&r2=157446&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu May 24 19:09:29 2012
> @@ -1549,9 +1549,8 @@
>
> // Check whether the function can return without sret-demotion.
> SmallVector<ISD::OutputArg, 4> Outs;
> - SmallVector<uint64_t, 4> Offsets;
> GetReturnInfo(I->getType(), CS.getAttributes().getRetAttributes(),
> - Outs, TLI, &Offsets);
> + Outs, TLI);
> bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),
> *FuncInfo.MF, FTy->isVarArg(),
> Outs, FTy->getContext());
>
> Modified: llvm/trunk/test/CodeGen/X86/bigstructret.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bigstructret.ll?rev=157446&r1=157445&r2=157446&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/bigstructret.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/bigstructret.ll Thu May 24 19:09:29 2012
> @@ -1,12 +1,15 @@
> -; RUN: llc < %s -march=x86 -o %t
> -; RUN: grep "movl .24601, 12(%ecx)" %t
> -; RUN: grep "movl .48, 8(%ecx)" %t
> -; RUN: grep "movl .24, 4(%ecx)" %t
> -; RUN: grep "movl .12, (%ecx)" %t
> +; RUN: llc < %s -march=x86 | FileCheck %s
>
> %0 = type { i32, i32, i32, i32 }
> +%1 = type { i1, i1, i1, i32 }
>
> -define internal fastcc %0 @ReturnBigStruct() nounwind readnone {
> +; CHECK: ReturnBigStruct
> +; CHECK: movl $24601, 12(%ecx)
> +; CHECK: movl $48, 8(%ecx)
> +; CHECK: movl $24, 4(%ecx)
> +; CHECK: movl $12, (%ecx)
> +
> +define fastcc %0 @ReturnBigStruct() nounwind readnone {
> entry:
> %0 = insertvalue %0 zeroinitializer, i32 12, 0
> %1 = insertvalue %0 %0, i32 24, 1
> @@ -15,3 +18,29 @@
> ret %0 %3
> }
>
> +; CHECK: ReturnBigStruct2
> +; CHECK: movl $48, 4(%ecx)
> +; CHECK: movb $1, 2(%ecx)
> +; CHECK: movb $1, 1(%ecx)
> +; CHECK: movb $0, (%ecx)
> +
> +define fastcc %1 @ReturnBigStruct2() nounwind readnone {
> +entry:
> + %0 = insertvalue %1 zeroinitializer, i1 false, 0
> + %1 = insertvalue %1 %0, i1 true, 1
> + %2 = insertvalue %1 %1, i1 true, 2
> + %3 = insertvalue %1 %2, i32 48, 3
> + ret %1 %3
> +}
> +
> +; CHECK: CallBigStruct2
> +; CHECK: leal 16(%esp), {{.*}}
> +; CHECK: call{{.*}}ReturnBigStruct2
> +; CHECK: subl $4, %esp
> +; CHECK: movl 20(%esp), %eax
> +define fastcc i32 @CallBigStruct2() nounwind readnone {
> +entry:
> + %0 = call %1 @ReturnBigStruct2()
> + %1 = extractvalue %1 %0, 3
> + ret i32 %1
> +}
>
>
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