<p>It seems the added test would be win32-incompatible...</p>
<div class="gmail_quote">2012/05/25 9:11 "Eli Friedman" <<a href="mailto:eli.friedman@gmail.com">eli.friedman@gmail.com</a>>:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: efriedma<br>
Date: Thu May 24 19:09:29 2012<br>
New Revision: 157446<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=157446&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=157446&view=rev</a><br>
Log:<br>
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process.<br>
<br>
<br>
Modified:<br>
    llvm/trunk/include/llvm/Target/TargetLowering.h<br>
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
    llvm/trunk/lib/Target/X86/X86FastISel.cpp<br>
    llvm/trunk/test/CodeGen/X86/bigstructret.ll<br>
<br>
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=157446&r1=157445&r2=157446&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=157446&r1=157445&r2=157446&view=diff</a><br>

==============================================================================<br>
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)<br>
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Thu May 24 19:09:29 2012<br>
@@ -2049,8 +2049,7 @@<br>
 /// the offsets, if the return value is being lowered to memory.<br>
 void GetReturnInfo(Type* ReturnType, Attributes attr,<br>
                    SmallVectorImpl<ISD::OutputArg> &Outs,<br>
-                   const TargetLowering &TLI,<br>
-                   SmallVectorImpl<uint64_t> *Offsets = 0);<br>
+                   const TargetLowering &TLI);<br>
<br>
 } // end llvm namespace<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=157446&r1=157445&r2=157446&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=157446&r1=157445&r2=157446&view=diff</a><br>

==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu May 24 19:09:29 2012<br>
@@ -5149,9 +5149,8 @@<br>
<br>
   // Check whether the function can return without sret-demotion.<br>
   SmallVector<ISD::OutputArg, 4> Outs;<br>
-  SmallVector<uint64_t, 4> Offsets;<br>
   GetReturnInfo(RetTy, CS.getAttributes().getRetAttributes(),<br>
-                Outs, TLI, &Offsets);<br>
+                Outs, TLI);<br>
<br>
   bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),<br>
                                           DAG.getMachineFunction(),<br>
@@ -5264,7 +5263,13 @@<br>
     ComputeValueVTs(TLI, PtrRetTy, PVTs);<br>
     assert(PVTs.size() == 1 && "Pointers should fit in one register");<br>
     EVT PtrVT = PVTs[0];<br>
-    unsigned NumValues = Outs.size();<br>
+<br>
+    SmallVector<EVT, 4> RetTys;<br>
+    SmallVector<uint64_t, 4> Offsets;<br>
+    RetTy = FTy->getReturnType();<br>
+    ComputeValueVTs(TLI, RetTy, RetTys, &Offsets);<br>
+<br>
+    unsigned NumValues = RetTys.size();<br>
     SmallVector<SDValue, 4> Values(NumValues);<br>
     SmallVector<SDValue, 4> Chains(NumValues);<br>
<br>
@@ -5272,8 +5277,7 @@<br>
       SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT,<br>
                                 DemoteStackSlot,<br>
                                 DAG.getConstant(Offsets[i], PtrVT));<br>
-      SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,<br>
-                              Add,<br>
+      SDValue L = DAG.getLoad(RetTys[i], getCurDebugLoc(), Result.second, Add,<br>
                   MachinePointerInfo::getFixedStack(DemoteStackIdx, Offsets[i]),<br>
                               false, false, false, 1);<br>
       Values[i] = L;<br>
@@ -5284,30 +5288,10 @@<br>
                                 MVT::Other, &Chains[0], NumValues);<br>
     PendingLoads.push_back(Chain);<br>
<br>
-    // Collect the legal value parts into potentially illegal values<br>
-    // that correspond to the original function's return values.<br>
-    SmallVector<EVT, 4> RetTys;<br>
-    RetTy = FTy->getReturnType();<br>
-    ComputeValueVTs(TLI, RetTy, RetTys);<br>
-    ISD::NodeType AssertOp = ISD::DELETED_NODE;<br>
-    SmallVector<SDValue, 4> ReturnValues;<br>
-    unsigned CurReg = 0;<br>
-    for (unsigned I = 0, E = RetTys.size(); I != E; ++I) {<br>
-      EVT VT = RetTys[I];<br>
-      EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT);<br>
-      unsigned NumRegs = TLI.getNumRegisters(RetTy->getContext(), VT);<br>
-<br>
-      SDValue ReturnValue =<br>
-        getCopyFromParts(DAG, getCurDebugLoc(), &Values[CurReg], NumRegs,<br>
-                         RegisterVT, VT, AssertOp);<br>
-      ReturnValues.push_back(ReturnValue);<br>
-      CurReg += NumRegs;<br>
-    }<br>
-<br>
     setValue(CS.getInstruction(),<br>
              DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),<br>
                          DAG.getVTList(&RetTys[0], RetTys.size()),<br>
-                         &ReturnValues[0], ReturnValues.size()));<br>
+                         &Values[0], Values.size()));<br>
   }<br>
<br>
   // Assign order to nodes here. If the call does not produce a result, it won't<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=157446&r1=157445&r2=157446&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=157446&r1=157445&r2=157446&view=diff</a><br>

==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu May 24 19:09:29 2012<br>
@@ -997,13 +997,11 @@<br>
 /// TODO: Move this out of TargetLowering.cpp.<br>
 void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,<br>
                          SmallVectorImpl<ISD::OutputArg> &Outs,<br>
-                         const TargetLowering &TLI,<br>
-                         SmallVectorImpl<uint64_t> *Offsets) {<br>
+                         const TargetLowering &TLI) {<br>
   SmallVector<EVT, 4> ValueVTs;<br>
   ComputeValueVTs(TLI, ReturnType, ValueVTs);<br>
   unsigned NumValues = ValueVTs.size();<br>
   if (NumValues == 0) return;<br>
-  unsigned Offset = 0;<br>
<br>
   for (unsigned j = 0, f = NumValues; j != f; ++j) {<br>
     EVT VT = ValueVTs[j];<br>
@@ -1026,8 +1024,6 @@<br>
<br>
     unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);<br>
     EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);<br>
-    unsigned PartSize = TLI.getTargetData()->getTypeAllocSize(<br>
-                        PartVT.getTypeForEVT(ReturnType->getContext()));<br>
<br>
     // 'inreg' on function refers to return value<br>
     ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();<br>
@@ -1042,10 +1038,6 @@<br>
<br>
     for (unsigned i = 0; i < NumParts; ++i) {<br>
       Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true));<br>
-      if (Offsets) {<br>
-        Offsets->push_back(Offset);<br>
-        Offset += PartSize;<br>
-      }<br>
     }<br>
   }<br>
 }<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=157446&r1=157445&r2=157446&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=157446&r1=157445&r2=157446&view=diff</a><br>

==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu May 24 19:09:29 2012<br>
@@ -1549,9 +1549,8 @@<br>
<br>
   // Check whether the function can return without sret-demotion.<br>
   SmallVector<ISD::OutputArg, 4> Outs;<br>
-  SmallVector<uint64_t, 4> Offsets;<br>
   GetReturnInfo(I->getType(), CS.getAttributes().getRetAttributes(),<br>
-                Outs, TLI, &Offsets);<br>
+                Outs, TLI);<br>
   bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),<br>
                                           *FuncInfo.MF, FTy->isVarArg(),<br>
                                           Outs, FTy->getContext());<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/bigstructret.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bigstructret.ll?rev=157446&r1=157445&r2=157446&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bigstructret.ll?rev=157446&r1=157445&r2=157446&view=diff</a><br>

==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/bigstructret.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/bigstructret.ll Thu May 24 19:09:29 2012<br>
@@ -1,12 +1,15 @@<br>
-; RUN: llc < %s -march=x86 -o %t<br>
-; RUN: grep "movl      .24601, 12(%ecx)" %t<br>
-; RUN: grep "movl      .48, 8(%ecx)" %t<br>
-; RUN: grep "movl      .24, 4(%ecx)" %t<br>
-; RUN: grep "movl      .12, (%ecx)" %t<br>
+; RUN: llc < %s -march=x86 | FileCheck %s<br>
<br>
 %0 = type { i32, i32, i32, i32 }<br>
+%1 = type { i1, i1, i1, i32 }<br>
<br>
-define internal fastcc %0 @ReturnBigStruct() nounwind readnone {<br>
+; CHECK: ReturnBigStruct<br>
+; CHECK: movl $24601, 12(%ecx)<br>
+; CHECK: movl  $48, 8(%ecx)<br>
+; CHECK: movl  $24, 4(%ecx)<br>
+; CHECK: movl  $12, (%ecx)<br>
+<br>
+define fastcc %0 @ReturnBigStruct() nounwind readnone {<br>
 entry:<br>
   %0 = insertvalue %0 zeroinitializer, i32 12, 0<br>
   %1 = insertvalue %0 %0, i32 24, 1<br>
@@ -15,3 +18,29 @@<br>
   ret %0 %3<br>
 }<br>
<br>
+; CHECK: ReturnBigStruct2<br>
+; CHECK: movl  $48, 4(%ecx)<br>
+; CHECK: movb  $1, 2(%ecx)<br>
+; CHECK: movb  $1, 1(%ecx)<br>
+; CHECK: movb  $0, (%ecx)<br>
+<br>
+define fastcc %1 @ReturnBigStruct2() nounwind readnone {<br>
+entry:<br>
+  %0 = insertvalue %1 zeroinitializer, i1 false, 0<br>
+  %1 = insertvalue %1 %0, i1 true, 1<br>
+  %2 = insertvalue %1 %1, i1 true, 2<br>
+  %3 = insertvalue %1 %2, i32 48, 3<br>
+  ret %1 %3<br>
+}<br>
+<br>
+; CHECK: CallBigStruct2<br>
+; CHECK: leal  16(%esp), {{.*}}<br>
+; CHECK: call{{.*}}ReturnBigStruct2<br>
+; CHECK: subl  $4, %esp<br>
+; CHECK: movl  20(%esp), %eax<br>
+define fastcc i32 @CallBigStruct2() nounwind readnone {<br>
+entry:<br>
+  %0 = call %1 @ReturnBigStruct2()<br>
+  %1 = extractvalue %1 %0, 3<br>
+  ret i32 %1<br>
+}<br>
<br>
<br>
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</blockquote></div>