[llvm-commits] [PATCH]Fix the LLVM v7 assembler and instruction printer for 8-bit immediate offset addressing

Silviu Baranga silbar01 at arm.com
Fri May 11 02:16:01 PDT 2012


Thanks! Committed to r156608.

 

Regards,

Silviu

 

From: Jim Grosbach [mailto:grosbach at apple.com] 
Sent: 10 May 2012 18:09
To: Silviu Baranga
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [PATCH]Fix the LLVM v7 assembler and instruction printer for
8-bit immediate offset addressing

 

LGTM.

 

Thanks!

 

-Jim

 

 

On May 10, 2012, at 9:26 AM, Silviu Baranga <silbar01 at arm.com> wrote:





Hi,

 

The assembler and instruction printer do not handle correctly the cases
where the immediate is #-0 for

the 8-bit immediate offset addressing on ARM v7 (e.g. [r1, #-0]). Currently
an instruction using this type

of operand will be assembled as undefined. This is because the assembler
encodes #-0 as INT_MIN,

which is not handled by the check in the isAddrMode3() function.

 

When printed, the addressing operand should have the #-0 included instead of
being ignored (e.g. should

be [r1,#-0] instead of [r1]) because the instruction encoding is different
for #-0 and #0.

 

The patch fixes these issues and adds a regression test.

 

Please review this patch.

 

Thanks,

Silviu

<negz.diff>

 
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