[llvm-commits] [llvm] r156540 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/avx-vbroadcast.ll

Nadav Rotem nadav.rotem at intel.com
Thu May 10 05:39:13 PDT 2012


Author: nadav
Date: Thu May 10 07:39:13 2012
New Revision: 156540

URL: http://llvm.org/viewvc/llvm-project?rev=156540&view=rev
Log:
AVX2: Add an additional broadcast idiom.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=156540&r1=156539&r2=156540&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 10 07:39:13 2012
@@ -4980,8 +4980,11 @@
         return SDValue();
 
       SDValue Sc = Op.getOperand(0);
-      if (Sc.getOpcode() != ISD::SCALAR_TO_VECTOR)
-        return SDValue();
+      if (Sc.getOpcode() == ISD::SCALAR_TO_VECTOR)
+        Ld = Sc.getOperand(0);
+      else if (Sc.getOpcode() == ISD::BUILD_VECTOR)
+        Ld = Sc.getOperand(0);
+      else return SDValue();
 
       Ld = Sc.getOperand(0);
       ConstSplatVal = (Ld.getOpcode() == ISD::Constant ||

Modified: llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll?rev=156540&r1=156539&r2=156540&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx-vbroadcast.ll Thu May 10 07:39:13 2012
@@ -129,3 +129,15 @@
   ret <4 x float> %vecinit6.i
 }
 
+
+; CHECK: _RR2
+; CHECK: vbroadcastss (%
+; CHECK: ret
+define <4 x float> @_RR2(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
+entry:
+  %q = load float* %ptr, align 4
+  %v = insertelement <4 x float> undef, float %q, i32 0
+  %t = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
+  ret <4 x float> %t
+}
+





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