[llvm-commits] [PATCH 02/11] (patch) Mips inline asm: Allow 64 bit integer values in gpu registers if arch and abi are 64 bit

[Eric Christopher]

On Apr 12, 2012, at 1:26 PM, Jack Carter <jcarter at mips.com> wrote:

> 
> ---
> lib/Target/Mips/MipsISelLowering.cpp           |    6 ++++--
> test/CodeGen/Mips/inlineasm-cnstrnt-bad-r-1.ll |   21 +++++++++++++++++++++
> test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll   |   20 ++++++++++++++++++++
> 3 files changed, 45 insertions(+), 2 deletions(-)
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-r-1.ll
> create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll
> <longlong_check.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

OK :)

-eric