[llvm-commits] [PATCH 05/11] (patch) Mips specific inline asm: constraint 'K':

[Jack Carter]

An unsigned 16 bit constant.

Example:
  int i_input = 0x00000400; int i_result = 0; int i_tmp = 0;

  // Good: i_val fits the criteria
  int i_val = 64;
  __asm__ __volatile__(
    "add %0,%1,%3\n\t" : "=r" (i_result) : "r" (i_input), "K" (i_val), "r" (i_tmp));

  // Bad: llc should complain
  int i_val = 0x00100003;
  __asm__ __volatile__(
    "add %0,%1,%3\n\t" : "=r" (i_result)  : "r" (i_input), "K" (i_val), "r" (i_tmp));
---
 lib/Target/Mips/MipsISelLowering.cpp         |   11 +++++++++++
 test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll |   13 +++++++++++++
 test/CodeGen/Mips/inlineasm_constraint.ll    |    6 ++++++
 3 files changed, 30 insertions(+), 0 deletions(-)
 create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll

-------------- next part --------------
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index b56ed80..c1d6a88 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2928,6 +2928,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
     break;
   case 'I': // signed 16 bit immediate
   case 'J': // integer zero
+  case 'K': // unsigned 16 bit immediate
     if (isa<ConstantInt>(CallOperandVal))
       weight = CW_Constant;
     break;
@@ -3001,6 +3002,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
       }
     }
     return;
+  case 'K': // unsigned 16 bit immediate
+    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
+      EVT Type = Op.getValueType();
+      uint64_t Val = (uint64_t)C->getZExtValue();
+      if (isUInt<16>(Val)) {
+        Result = DAG.getTargetConstant(Val, Type);
+        break;
+      }
+    }
+    return;
   }
 
   if (Result.getNode()) {
diff --git a/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll
new file mode 100644
index 0000000..4e60acc
--- /dev/null
+++ b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll
@@ -0,0 +1,13 @@
+;XFAIL:
+;
+;This is a negative test. The constant value given for the constraint (K)
+;is greater than 16 bits (0x00100000).
+;
+; RUN: not llc -march=mipsel < %s 
+
+define i32 @main() nounwind {
+entry:
+  tail call i32 asm "addu $0,$1,$2", "=r,r,K"(i32 1024, i32 1048576) nounwind
+  ret i32 0
+}
+
diff --git a/test/CodeGen/Mips/inlineasm_constraint.ll b/test/CodeGen/Mips/inlineasm_constraint.ll
index f053e0e..04bd513 100644
--- a/test/CodeGen/Mips/inlineasm_constraint.ll
+++ b/test/CodeGen/Mips/inlineasm_constraint.ll
@@ -21,6 +21,12 @@ entry:
 ; CHECK: #NO_APP
   tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
 
+; Now K with 64
+; CHECK: #APP
+; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64
+; CHECK: #NO_APP	
+  tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
+
   ret i32 0
 }