[llvm-commits] [llvm] r153696 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Lang Hames
lhames at gmail.com
Thu Mar 29 15:01:25 PDT 2012
Committed as part of work on <rdar://problem/10437079>.
- Lang.
On Thu, Mar 29, 2012 at 2:56 PM, Lang Hames <lhames at gmail.com> wrote:
> Author: lhames
> Date: Thu Mar 29 16:56:11 2012
> New Revision: 153696
>
> URL: http://llvm.org/viewvc/llvm-project?rev=153696&view=rev
> Log:
> Try using vmov.i32 to materialize FP32 constants that can't be
> materialized by
> vmov.f32.
>
> Modified:
> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=153696&r1=153695&r2=153696&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Mar 29 16:56:11 2012
> @@ -507,7 +507,7 @@
> setOperationAction(ISD::FRINT, MVT::v2f64, Expand);
> setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand);
> setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand);
> -
> +
> setOperationAction(ISD::FSQRT, MVT::v4f32, Expand);
> setOperationAction(ISD::FSIN, MVT::v4f32, Expand);
> setOperationAction(ISD::FCOS, MVT::v4f32, Expand);
> @@ -3672,27 +3672,6 @@
> return Result;
> }
>
> -SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,
> - const ARMSubtarget *ST) const {
> - if (!ST->useNEONForSinglePrecisionFP() || !ST->hasVFP3() ||
> ST->hasD16())
> - return SDValue();
> -
> - ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);
> - assert(Op.getValueType() == MVT::f32 &&
> - "ConstantFP custom lowering should only occur for f32.");
> -
> - APFloat FPVal = CFP->getValueAPF();
> - int ImmVal = ARM_AM::getFP32Imm(FPVal);
> - if (ImmVal == -1)
> - return SDValue();
> -
> - DebugLoc DL = Op.getDebugLoc();
> - SDValue NewVal = DAG.getTargetConstant(ImmVal, MVT::i32);
> - SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32,
> NewVal);
> - return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant,
> - DAG.getConstant(0, MVT::i32));
> -}
> -
> /// isNEONModifiedImm - Check if the specified splat value corresponds to
> a
> /// valid vector constant for a NEON instruction with a "modified
> immediate"
> /// operand (e.g., VMOV). If so, return the encoded value.
> @@ -3829,6 +3808,58 @@
> return DAG.getTargetConstant(EncodedVal, MVT::i32);
> }
>
> +SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,
> + const ARMSubtarget *ST) const {
> + if (!ST->useNEONForSinglePrecisionFP() || !ST->hasVFP3() ||
> ST->hasD16())
> + return SDValue();
> +
> + ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);
> + assert(Op.getValueType() == MVT::f32 &&
> + "ConstantFP custom lowering should only occur for f32.");
> +
> + // Try splatting with a VMOV.f32...
> + APFloat FPVal = CFP->getValueAPF();
> + int ImmVal = ARM_AM::getFP32Imm(FPVal);
> + if (ImmVal != -1) {
> + DebugLoc DL = Op.getDebugLoc();
> + SDValue NewVal = DAG.getTargetConstant(ImmVal, MVT::i32);
> + SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32,
> + NewVal);
> + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant,
> + DAG.getConstant(0, MVT::i32));
> + }
> +
> + // If that fails, try a VMOV.i32
> + EVT VMovVT;
> + unsigned iVal = FPVal.bitcastToAPInt().getZExtValue();
> + SDValue NewVal = isNEONModifiedImm(iVal, 0, 32, DAG, VMovVT, false,
> + VMOVModImm);
> + if (NewVal != SDValue()) {
> + DebugLoc DL = Op.getDebugLoc();
> + SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT,
> + NewVal);
> + SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32,
> + VecConstant);
> + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32,
> VecFConstant,
> + DAG.getConstant(0, MVT::i32));
> + }
> +
> + // Finally, try a VMVN.i32
> + NewVal = isNEONModifiedImm(~iVal & 0xffffffff, 0, 32, DAG, VMovVT,
> false,
> + VMVNModImm);
> + if (NewVal != SDValue()) {
> + DebugLoc DL = Op.getDebugLoc();
> + SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT,
> NewVal);
> + SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32,
> + VecConstant);
> + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32,
> VecFConstant,
> + DAG.getConstant(0, MVT::i32));
> + }
> +
> + return SDValue();
> +}
> +
> +
> static bool isVEXTMask(ArrayRef<int> M, EVT VT,
> bool &ReverseVEXT, unsigned &Imm) {
> unsigned NumElts = VT.getVectorNumElements();
> @@ -5869,7 +5900,7 @@
> BuildMI(DispatchBB, dl, TII->get(ARM::tInt_eh_sjlj_dispatchsetup));
> else if (!Subtarget->hasVFP2())
> BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup_nofp));
> - else
> + else
> BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup));
>
> unsigned NumLPads = LPadList.size();
>
>
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