Committed as part of work on <rdar://problem/10437079>.<div><br></div><div>- Lang.<br><br><div class="gmail_quote">On Thu, Mar 29, 2012 at 2:56 PM, Lang Hames <span dir="ltr"><<a href="mailto:lhames@gmail.com">lhames@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: lhames<br>
Date: Thu Mar 29 16:56:11 2012<br>
New Revision: 153696<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=153696&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=153696&view=rev</a><br>
Log:<br>
Try using vmov.i32 to materialize FP32 constants that can't be materialized by<br>
vmov.f32.<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=153696&r1=153695&r2=153696&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=153696&r1=153695&r2=153696&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Mar 29 16:56:11 2012<br>
@@ -507,7 +507,7 @@<br>
setOperationAction(ISD::FRINT, MVT::v2f64, Expand);<br>
setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand);<br>
setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand);<br>
-<br>
+<br>
setOperationAction(ISD::FSQRT, MVT::v4f32, Expand);<br>
setOperationAction(ISD::FSIN, MVT::v4f32, Expand);<br>
setOperationAction(ISD::FCOS, MVT::v4f32, Expand);<br>
@@ -3672,27 +3672,6 @@<br>
return Result;<br>
}<br>
<br>
-SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,<br>
- const ARMSubtarget *ST) const {<br>
- if (!ST->useNEONForSinglePrecisionFP() || !ST->hasVFP3() || ST->hasD16())<br>
- return SDValue();<br>
-<br>
- ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);<br>
- assert(Op.getValueType() == MVT::f32 &&<br>
- "ConstantFP custom lowering should only occur for f32.");<br>
-<br>
- APFloat FPVal = CFP->getValueAPF();<br>
- int ImmVal = ARM_AM::getFP32Imm(FPVal);<br>
- if (ImmVal == -1)<br>
- return SDValue();<br>
-<br>
- DebugLoc DL = Op.getDebugLoc();<br>
- SDValue NewVal = DAG.getTargetConstant(ImmVal, MVT::i32);<br>
- SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32, NewVal);<br>
- return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant,<br>
- DAG.getConstant(0, MVT::i32));<br>
-}<br>
-<br>
/// isNEONModifiedImm - Check if the specified splat value corresponds to a<br>
/// valid vector constant for a NEON instruction with a "modified immediate"<br>
/// operand (e.g., VMOV). If so, return the encoded value.<br>
@@ -3829,6 +3808,58 @@<br>
return DAG.getTargetConstant(EncodedVal, MVT::i32);<br>
}<br>
<br>
+SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,<br>
+ const ARMSubtarget *ST) const {<br>
+ if (!ST->useNEONForSinglePrecisionFP() || !ST->hasVFP3() || ST->hasD16())<br>
+ return SDValue();<br>
+<br>
+ ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);<br>
+ assert(Op.getValueType() == MVT::f32 &&<br>
+ "ConstantFP custom lowering should only occur for f32.");<br>
+<br>
+ // Try splatting with a VMOV.f32...<br>
+ APFloat FPVal = CFP->getValueAPF();<br>
+ int ImmVal = ARM_AM::getFP32Imm(FPVal);<br>
+ if (ImmVal != -1) {<br>
+ DebugLoc DL = Op.getDebugLoc();<br>
+ SDValue NewVal = DAG.getTargetConstant(ImmVal, MVT::i32);<br>
+ SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32,<br>
+ NewVal);<br>
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant,<br>
+ DAG.getConstant(0, MVT::i32));<br>
+ }<br>
+<br>
+ // If that fails, try a VMOV.i32<br>
+ EVT VMovVT;<br>
+ unsigned iVal = FPVal.bitcastToAPInt().getZExtValue();<br>
+ SDValue NewVal = isNEONModifiedImm(iVal, 0, 32, DAG, VMovVT, false,<br>
+ VMOVModImm);<br>
+ if (NewVal != SDValue()) {<br>
+ DebugLoc DL = Op.getDebugLoc();<br>
+ SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT,<br>
+ NewVal);<br>
+ SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32,<br>
+ VecConstant);<br>
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant,<br>
+ DAG.getConstant(0, MVT::i32));<br>
+ }<br>
+<br>
+ // Finally, try a VMVN.i32<br>
+ NewVal = isNEONModifiedImm(~iVal & 0xffffffff, 0, 32, DAG, VMovVT, false,<br>
+ VMVNModImm);<br>
+ if (NewVal != SDValue()) {<br>
+ DebugLoc DL = Op.getDebugLoc();<br>
+ SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT, NewVal);<br>
+ SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32,<br>
+ VecConstant);<br>
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant,<br>
+ DAG.getConstant(0, MVT::i32));<br>
+ }<br>
+<br>
+ return SDValue();<br>
+}<br>
+<br>
+<br>
static bool isVEXTMask(ArrayRef<int> M, EVT VT,<br>
bool &ReverseVEXT, unsigned &Imm) {<br>
unsigned NumElts = VT.getVectorNumElements();<br>
@@ -5869,7 +5900,7 @@<br>
BuildMI(DispatchBB, dl, TII->get(ARM::tInt_eh_sjlj_dispatchsetup));<br>
else if (!Subtarget->hasVFP2())<br>
BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup_nofp));<br>
- else<br>
+ else<br>
BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup));<br>
<br>
unsigned NumLPads = LPadList.size();<br>
<br>
<br>
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</blockquote></div><br></div>