[llvm-commits] [PATCH][Review request] disassemble JCXZ JECXZ JRCXZ

[Kay Tiong Khoo]

Sorry about that - I had stuck that in during development of this patch
because tablegen was dying there complaining about opcode overlaps. But
everything seems fine without that check now.

Updated patch attached.

On Thu, Feb 23, 2012 at 9:16 PM, Craig Topper <craig.topper at gmail.com>wrote:

> Why is this needed? If it is needed, please replace the tab characters at
> the beginning of the lines with spaces.
>
> @@ -648,7 +657,10 @@
>          if(newInfo.filtered)
>            continue; // filtered instructions get lowest priority
>
> -        if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
> +        if(previousInfo.name == "JCXZ" || previousInfo.name ==
> "JECXZ_64")
> +      continue; // AdSize prefix distinguishes between JCXZ/JECXZ/JRCXZ
> +
> +    if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
>                                             newInfo.name == "XCHG32ar" ||
>                                             newInfo.name == "XCHG32ar64" ||
>                                             newInfo.name == "XCHG64ar"))
>
>
> Unfortunately, this increases disassembler table size, but there's no good
> way around that with the current design. Otherwise LGTM.
>
> ~Craig
>
> On Thu, Feb 23, 2012 at 7:10 PM, Kay Tiong Khoo <kkhoo at perfwizard.com>wrote:
>
>> The attached patch enables disassembly of JCXZ/JECXZ (i386) and
>> JECXZ/JRCXZ (x86-64). See bug 11643 (
>> http://llvm.org/bugs/show_bug.cgi?id=11643 ) for more details.
>>
>> It's not clear to me why these common instructions were marked with
>> "isAsmParserOnly = 1", so I'm not sure if the changes in this patch are the
>> best way to enable their disassembly. Please review and let me know. Thanks.
>>
>> KK
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>>
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