[llvm-commits] [llvm] r150795 - in /llvm/trunk/lib/Target/X86: X86InstrFragmentsSIMD.td X86InstrSSE.td

Craig Topper craig.topper at gmail.com
Fri Feb 17 08:58:19 PST 2012


That's what I plan to work on next.

On Fri, Feb 17, 2012 at 12:58 AM, Chris Lattner <clattner at apple.com> wrote:

>
> On Feb 16, 2012, at 11:02 PM, Craig Topper wrote:
>
> > Author: ctopper
> > Date: Fri Feb 17 01:02:34 2012
> > New Revision: 150795
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=150795&view=rev
> > Log:
> > Remove the last of the old vector_shuffle patterns from X86 isel.
>
> Very nice!  A lot of predicates like isMOVHLPSMask can now become static
> functions.
>
> -Chris
>
> >
> > Modified:
> >    llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
> >    llvm/trunk/lib/Target/X86/X86InstrSSE.td
> >
> > Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=150795&r1=150794&r2=150795&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)
> > +++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Fri Feb 17
> 01:02:34 2012
> > @@ -342,12 +342,6 @@
> >   return getI32Imm(N->getZExtValue() >> 3);
> > }]>;
> >
> > -// SHUFFLE_get_shuf_imm xform function: convert vector_shuffle mask to
> PSHUF*,
> > -// SHUFP* etc. imm.
> > -def SHUFFLE_get_shuf_imm : SDNodeXForm<vector_shuffle, [{
> > -  return
> getI8Imm(X86::getShuffleSHUFImmediate(cast<ShuffleVectorSDNode>(N)));
> > -}]>;
> > -
> > // EXTRACT_get_vextractf128_imm xform function: convert
> extract_subvector index
> > // to VEXTRACTF128 imm.
> > def EXTRACT_get_vextractf128_imm : SDNodeXForm<extract_subvector, [{
> > @@ -360,26 +354,6 @@
> >   return getI8Imm(X86::getInsertVINSERTF128Immediate(N));
> > }]>;
> >
> > -def movhlps : PatFrag<(ops node:$lhs, node:$rhs),
> > -                      (vector_shuffle node:$lhs, node:$rhs), [{
> > -  return X86::isMOVHLPSMask(cast<ShuffleVectorSDNode>(N));
> > -}]>;
> > -
> > -def movhlps_undef : PatFrag<(ops node:$lhs, node:$rhs),
> > -                            (vector_shuffle node:$lhs, node:$rhs), [{
> > -  return X86::isMOVHLPS_v_undef_Mask(cast<ShuffleVectorSDNode>(N));
> > -}]>;
> > -
> > -def movlhps : PatFrag<(ops node:$lhs, node:$rhs),
> > -                      (vector_shuffle node:$lhs, node:$rhs), [{
> > -  return X86::isMOVLHPSMask(cast<ShuffleVectorSDNode>(N));
> > -}]>;
> > -
> > -def movlp : PatFrag<(ops node:$lhs, node:$rhs),
> > -                    (vector_shuffle node:$lhs, node:$rhs), [{
> > -  return X86::isMOVLPMask(cast<ShuffleVectorSDNode>(N));
> > -}]>;
> > -
> > def vextractf128_extract : PatFrag<(ops node:$bigvec, node:$index),
> >                                    (extract_subvector node:$bigvec,
> >                                                       node:$index), [{
> >
> > Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=150795&r1=150794&r2=150795&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> > +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Feb 17 01:02:34 2012
> > @@ -945,30 +945,30 @@
> >
> //===----------------------------------------------------------------------===//
> >
> > multiclass sse12_mov_hilo_packed<bits<8>opc, RegisterClass RC,
> > -                                 PatFrag mov_frag, string base_opc,
> > +                                 SDNode psnode, SDNode pdnode, string
> base_opc,
> >                                  string asm_opr> {
> >   def PSrm : PI<opc, MRMSrcMem,
> >          (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
> >          !strconcat(base_opc, "s", asm_opr),
> >      [(set RC:$dst,
> > -       (mov_frag RC:$src1,
> > +       (psnode RC:$src1,
> >               (bc_v4f32 (v2f64 (scalar_to_vector (loadf64
> addr:$src2))))))],
> >               IIC_DEFAULT, SSEPackedSingle>, TB;
> >
> >   def PDrm : PI<opc, MRMSrcMem,
> >          (outs RC:$dst), (ins RC:$src1, f64mem:$src2),
> >          !strconcat(base_opc, "d", asm_opr),
> > -     [(set RC:$dst, (v2f64 (mov_frag RC:$src1,
> > +     [(set RC:$dst, (v2f64 (pdnode RC:$src1,
> >                               (scalar_to_vector (loadf64
> addr:$src2)))))],
> >               IIC_DEFAULT, SSEPackedDouble>, TB, OpSize;
> > }
> >
> > let AddedComplexity = 20 in {
> > -  defm VMOVL : sse12_mov_hilo_packed<0x12, VR128, movlp, "movlp",
> > +  defm VMOVL : sse12_mov_hilo_packed<0x12, VR128, X86Movlps, X86Movlpd,
> "movlp",
> >                      "\t{$src2, $src1, $dst|$dst, $src1, $src2}">,
> VEX_4V;
> > }
> > let Constraints = "$src1 = $dst", AddedComplexity = 20 in {
> > -  defm MOVL : sse12_mov_hilo_packed<0x12, VR128, movlp, "movlp",
> > +  defm MOVL : sse12_mov_hilo_packed<0x12, VR128, X86Movlps, X86Movlpd,
> "movlp",
> >                                    "\t{$src2, $dst|$dst, $src2}">;
> > }
> >
> > @@ -990,49 +990,17 @@
> >                                  (iPTR 0))), addr:$dst)]>;
> >
> > let Predicates = [HasAVX] in {
> > -  let AddedComplexity = 20 in {
> > -    // vector_shuffle v1, (load v2) <4, 5, 2, 3> using MOVLPS
> > -    def : Pat<(v4f32 (movlp VR128:$src1, (load addr:$src2))),
> > -              (VMOVLPSrm VR128:$src1, addr:$src2)>;
> > -    def : Pat<(v4i32 (movlp VR128:$src1, (load addr:$src2))),
> > -              (VMOVLPSrm VR128:$src1, addr:$src2)>;
> > -    // vector_shuffle v1, (load v2) <2, 1> using MOVLPS
> > -    def : Pat<(v2f64 (movlp VR128:$src1, (load addr:$src2))),
> > -              (VMOVLPDrm VR128:$src1, addr:$src2)>;
> > -    def : Pat<(v2i64 (movlp VR128:$src1, (load addr:$src2))),
> > -              (VMOVLPDrm VR128:$src1, addr:$src2)>;
> > -  }
> > -
> > -  // (store (vector_shuffle (load addr), v2, <4, 5, 2, 3>), addr) using
> MOVLPS
> > -  def : Pat<(store (v4f32 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (VMOVLPSmr addr:$src1, VR128:$src2)>;
> > -  def : Pat<(store (v4i32 (movlp (bc_v4i32 (loadv2i64 addr:$src1)),
> > -                                 VR128:$src2)), addr:$src1),
> > -            (VMOVLPSmr addr:$src1, VR128:$src2)>;
> > -
> > -  // (store (vector_shuffle (load addr), v2, <2, 1>), addr) using MOVLPS
> > -  def : Pat<(store (v2f64 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (VMOVLPDmr addr:$src1, VR128:$src2)>;
> > -  def : Pat<(store (v2i64 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (VMOVLPDmr addr:$src1, VR128:$src2)>;
> > -
> >   // Shuffle with VMOVLPS
> >   def : Pat<(v4f32 (X86Movlps VR128:$src1, (load addr:$src2))),
> >             (VMOVLPSrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(v4i32 (X86Movlps VR128:$src1, (load addr:$src2))),
> >             (VMOVLPSrm VR128:$src1, addr:$src2)>;
> > -  def : Pat<(X86Movlps VR128:$src1,
> > -                      (bc_v4f32 (v2f64 (scalar_to_vector (loadf64
> addr:$src2))))),
> > -            (VMOVLPSrm VR128:$src1, addr:$src2)>;
> >
> >   // Shuffle with VMOVLPD
> >   def : Pat<(v2f64 (X86Movlpd VR128:$src1, (load addr:$src2))),
> >             (VMOVLPDrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(v2i64 (X86Movlpd VR128:$src1, (load addr:$src2))),
> >             (VMOVLPDrm VR128:$src1, addr:$src2)>;
> > -  def : Pat<(v2f64 (X86Movlpd VR128:$src1,
> > -                              (scalar_to_vector (loadf64 addr:$src2)))),
> > -            (VMOVLPDrm VR128:$src1, addr:$src2)>;
> >
> >   // Store patterns
> >   def : Pat<(store (v4f32 (X86Movlps (load addr:$src1), VR128:$src2)),
> > @@ -1050,23 +1018,10 @@
> > }
> >
> > let Predicates = [HasSSE1] in {
> > -  let AddedComplexity = 20 in {
> > -    // vector_shuffle v1, (load v2) <4, 5, 2, 3> using MOVLPS
> > -    def : Pat<(v4f32 (movlp VR128:$src1, (load addr:$src2))),
> > -              (MOVLPSrm VR128:$src1, addr:$src2)>;
> > -    def : Pat<(v4i32 (movlp VR128:$src1, (load addr:$src2))),
> > -              (MOVLPSrm VR128:$src1, addr:$src2)>;
> > -  }
> > -
> >   // (store (vector_shuffle (load addr), v2, <4, 5, 2, 3>), addr) using
> MOVLPS
> >   def : Pat<(store (i64 (vector_extract (bc_v2i64 (v4f32 VR128:$src2)),
> >                                  (iPTR 0))), addr:$src1),
> >             (MOVLPSmr addr:$src1, VR128:$src2)>;
> > -  def : Pat<(store (v4f32 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (MOVLPSmr addr:$src1, VR128:$src2)>;
> > -  def : Pat<(store (v4i32 (movlp (bc_v4i32 (loadv2i64 addr:$src1)),
> > -                                 VR128:$src2)), addr:$src1),
> > -            (MOVLPSmr addr:$src1, VR128:$src2)>;
> >
> >   // Shuffle with MOVLPS
> >   def : Pat<(v4f32 (X86Movlps VR128:$src1, (load addr:$src2))),
> > @@ -1074,9 +1029,6 @@
> >   def : Pat<(v4i32 (X86Movlps VR128:$src1, (load addr:$src2))),
> >             (MOVLPSrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(X86Movlps VR128:$src1,
> > -                      (bc_v4f32 (v2f64 (scalar_to_vector (loadf64
> addr:$src2))))),
> > -            (MOVLPSrm VR128:$src1, addr:$src2)>;
> > -  def : Pat<(X86Movlps VR128:$src1,
> >                       (bc_v4f32 (v2i64 (scalar_to_vector (loadi64
> addr:$src2))))),
> >             (MOVLPSrm VR128:$src1, addr:$src2)>;
> >
> > @@ -1091,28 +1043,11 @@
> > }
> >
> > let Predicates = [HasSSE2] in {
> > -  let AddedComplexity = 20 in {
> > -    // vector_shuffle v1, (load v2) <2, 1> using MOVLPS
> > -    def : Pat<(v2f64 (movlp VR128:$src1, (load addr:$src2))),
> > -              (MOVLPDrm VR128:$src1, addr:$src2)>;
> > -    def : Pat<(v2i64 (movlp VR128:$src1, (load addr:$src2))),
> > -              (MOVLPDrm VR128:$src1, addr:$src2)>;
> > -  }
> > -
> > -  // (store (vector_shuffle (load addr), v2, <2, 1>), addr) using MOVLPS
> > -  def : Pat<(store (v2f64 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (MOVLPDmr addr:$src1, VR128:$src2)>;
> > -  def : Pat<(store (v2i64 (movlp (load addr:$src1), VR128:$src2)),
> addr:$src1),
> > -            (MOVLPDmr addr:$src1, VR128:$src2)>;
> > -
> >   // Shuffle with MOVLPD
> >   def : Pat<(v2f64 (X86Movlpd VR128:$src1, (load addr:$src2))),
> >             (MOVLPDrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(v2i64 (X86Movlpd VR128:$src1, (load addr:$src2))),
> >             (MOVLPDrm VR128:$src1, addr:$src2)>;
> > -  def : Pat<(v2f64 (X86Movlpd VR128:$src1,
> > -                              (scalar_to_vector (loadf64 addr:$src2)))),
> > -            (MOVLPDrm VR128:$src1, addr:$src2)>;
> >
> >   // Store patterns
> >   def : Pat<(store (v2f64 (X86Movlpd (load addr:$src1), VR128:$src2)),
> > @@ -1128,11 +1063,11 @@
> >
> //===----------------------------------------------------------------------===//
> >
> > let AddedComplexity = 20 in {
> > -  defm VMOVH : sse12_mov_hilo_packed<0x16, VR128, movlhps, "movhp",
> > +  defm VMOVH : sse12_mov_hilo_packed<0x16, VR128, X86Movlhps,
> X86Movlhpd, "movhp",
> >                      "\t{$src2, $src1, $dst|$dst, $src1, $src2}">,
> VEX_4V;
> > }
> > let Constraints = "$src1 = $dst", AddedComplexity = 20 in {
> > -  defm MOVH : sse12_mov_hilo_packed<0x16, VR128, movlhps, "movhp",
> > +  defm MOVH : sse12_mov_hilo_packed<0x16, VR128, X86Movlhps,
> X86Movlhpd, "movhp",
> >                                    "\t{$src2, $dst|$dst, $src2}">;
> > }
> >
> > @@ -1163,11 +1098,6 @@
> >
> > let Predicates = [HasAVX] in {
> >   // VMOVHPS patterns
> > -  def : Pat<(movlhps VR128:$src1, (bc_v4i32 (v2i64 (X86vzload
> addr:$src2)))),
> > -            (VMOVHPSrm (v4i32 VR128:$src1), addr:$src2)>;
> > -  def : Pat<(X86Movlhps VR128:$src1,
> > -                 (bc_v4f32 (v2f64 (scalar_to_vector (loadf64
> addr:$src2))))),
> > -            (VMOVHPSrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(X86Movlhps VR128:$src1,
> >                  (bc_v4f32 (v2i64 (scalar_to_vector (loadi64
> addr:$src2))))),
> >             (VMOVHPSrm VR128:$src1, addr:$src2)>;
> > @@ -1182,20 +1112,10 @@
> >   def : Pat<(v2f64 (X86Unpckl VR128:$src1,
> >                       (scalar_to_vector (loadf64 addr:$src2)))),
> >             (VMOVHPDrm VR128:$src1, addr:$src2)>;
> > -
> > -  // FIXME: This should be matched by a X86Movhpd instead. Same as above
> > -  def : Pat<(v2f64 (X86Movlhpd VR128:$src1,
> > -                      (scalar_to_vector (loadf64 addr:$src2)))),
> > -            (VMOVHPDrm VR128:$src1, addr:$src2)>;
> > }
> >
> > let Predicates = [HasSSE1] in {
> >   // MOVHPS patterns
> > -  def : Pat<(movlhps VR128:$src1, (bc_v4i32 (v2i64 (X86vzload
> addr:$src2)))),
> > -            (MOVHPSrm (v4i32 VR128:$src1), addr:$src2)>;
> > -  def : Pat<(X86Movlhps VR128:$src1,
> > -                 (bc_v4f32 (v2f64 (scalar_to_vector (loadf64
> addr:$src2))))),
> > -            (MOVHPSrm VR128:$src1, addr:$src2)>;
> >   def : Pat<(X86Movlhps VR128:$src1,
> >                  (bc_v4f32 (v2i64 (scalar_to_vector (loadi64
> addr:$src2))))),
> >             (MOVHPSrm VR128:$src1, addr:$src2)>;
> > @@ -1212,11 +1132,6 @@
> >   def : Pat<(v2f64 (X86Unpckl VR128:$src1,
> >                       (scalar_to_vector (loadf64 addr:$src2)))),
> >             (MOVHPDrm VR128:$src1, addr:$src2)>;
> > -
> > -  // FIXME: This should be matched by a X86Movhpd instead. Same as above
> > -  def : Pat<(v2f64 (X86Movlhpd VR128:$src1,
> > -                      (scalar_to_vector (loadf64 addr:$src2)))),
> > -            (MOVHPDrm VR128:$src1, addr:$src2)>;
> > }
> >
> >
> //===----------------------------------------------------------------------===//
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>


-- 
~Craig
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