[llvm-commits] [llvm] r147339 - /llvm/trunk/lib/Target/X86/X86.td

[Craig Topper]

Doesn't having SSE42 explicitly imply popcnt make disabling popcnt through
mattr also disable SSE42?

On Thu, Dec 29, 2011 at 12:20 PM, Benjamin Kramer
<benny.kra at googlemail.com>wrote:

>
> On 29.12.2011, at 16:51, Craig Topper wrote:
>
> > Author: ctopper
> > Date: Thu Dec 29 09:51:45 2011
> > New Revision: 147339
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=147339&view=rev
> > Log:
> > Make SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be
> disabled on its own without disabling SSE4.2 or SSE4A.
>
> Hi Craig,
>
> What's your intention here? popcnt is part of sse42 and sse4a so you won't
> find a processor that has sse42/a and not popcnt. It simplifies the model
> descriptions in this file. You can still selectively enable sse42 and
> disable the popcnt feature (e.g. "llc -mattr=+sse42,-popcnt" or "clang
> -msse4.2 -mno-popcnt") and it won't emit popcnt instructions.
>
> This patch disables popcnt emission unless it's explicitly enabled (think
> of the JIT). Please revert this patch.
>
> - Ben
>
> >
> > Modified:
> >    llvm/trunk/lib/Target/X86/X86.td
> >
> > Modified: llvm/trunk/lib/Target/X86/X86.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=147339&r1=147338&r2=147339&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86.td (original)
> > +++ llvm/trunk/lib/Target/X86/X86.td Thu Dec 29 09:51:45 2011
> > @@ -55,7 +55,7 @@
> >                                       [FeatureSSSE3]>;
> > def FeatureSSE42   : SubtargetFeature<"sse42", "X86SSELevel", "SSE42",
> >                                       "Enable SSE 4.2 instructions",
> > -                                      [FeatureSSE41, FeaturePOPCNT]>;
> > +                                      [FeatureSSE41]>;
> > def Feature3DNow   : SubtargetFeature<"3dnow", "X863DNowLevel",
> "ThreeDNow",
> >                                       "Enable 3DNow! instructions",
> >                                       [FeatureMMX]>;
> > @@ -77,8 +77,7 @@
> >                                         "IsUAMemFast", "true",
> >                                         "Fast unaligned memory access">;
> > def FeatureSSE4A   : SubtargetFeature<"sse4a", "HasSSE4A", "true",
> > -                                      "Support SSE 4a instructions",
> > -                                      [FeaturePOPCNT]>;
> > +                                      "Support SSE 4a instructions">;
> >
> > def FeatureAVX     : SubtargetFeature<"avx", "HasAVX", "true",
> >                                       "Enable AVX instructions">;
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>


-- 
~Craig
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