[llvm-commits] Patch: new backend for Hexagon processor

[Jakob Stoklund Olesen]

On Dec 9, 2011, at 10:28 AM, Tony Linthicum wrote:

>> +++ b/lib/Target/Hexagon/HexagonRegisterInfo.h
>> 
>> +#define HEXAGON_RESERVED_REG_1 Hexagon::R10
>> +#define HEXAGON_RESERVED_REG_2 Hexagon::R11
>> 
>> Hmm. Does that have to go in a header file? Have you looked into using the register scavenger instead of reserving registers?
>> 
> 
> We are actually currently working on utilizing the register scavenger for this instead.  Can we submit that later when it is done?

Sure.

This is for spilling predicates, right? Hal is fighting the same problem over in the PowerPC target.

/jakob