[llvm-commits] [llvm] r146097 - /llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

[Akira Hatanaka]

Author: ahatanak
Date: Wed Dec  7 17:21:19 2011
New Revision: 146097

URL: http://llvm.org/viewvc/llvm-project?rev=146097&view=rev
Log:
32 to 64-bit anyext pattern.


Modified:
    llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=146097&r1=146096&r2=146097&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Wed Dec  7 17:21:19 2011
@@ -225,6 +225,9 @@
 def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
                    "dsll32\t$rd, $rt, 0", [], IIAlu>;
 
+def SLL64_32 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt),
+                  "sll\t$rd, $rt, 0", [], IIAlu>;
+
 //===----------------------------------------------------------------------===//
 //  Arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
@@ -300,4 +303,5 @@
           (SLL (EXTRACT_SUBREG CPU64Regs:$src, sub_32), 0)>, Requires<[IsN64]>;
  
 // 32-to-64-bit extension
+def : Pat<(i64 (anyext CPURegs:$src)), (SLL64_32 CPURegs:$src)>;
 def : Pat<(i64 (zext CPURegs:$src)), (DSRL32 (DSLL64_32 CPURegs:$src), 0)>;