[llvm-commits] [llvm] r143990 - /llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

[Akira Hatanaka]

Author: ahatanak
Date: Mon Nov  7 13:01:49 2011
New Revision: 143990

URL: http://llvm.org/viewvc/llvm-project?rev=143990&view=rev
Log:
Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted
when shift amount is larger than 32.


Modified:
    llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=143990&r1=143989&r2=143990&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Mon Nov  7 13:01:49 2011
@@ -155,9 +155,9 @@
           (ORi64 ZERO_64, imm:$in)>;
 
 // zextloadi32_u
-def : Pat<(zextloadi32_u addr:$a), (DSRL (DSLL (ULW64_P8 addr:$a), 32), 32)>,
+def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64_P8 addr:$a), 0), 0)>,
       Requires<[IsN64]>;
-def : Pat<(zextloadi32_u addr:$a), (DSRL (DSLL (ULW64 addr:$a), 32), 32)>,
+def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64 addr:$a), 0), 0)>,
       Requires<[NotN64]>;
 
 // hi/lo relocs