[llvm-commits] [llvm] r143989 - in /llvm/trunk/lib/Target/Mips: Mips64InstrInfo.td MipsISelLowering.h MipsInstrInfo.td

[Akira Hatanaka]

Author: ahatanak
Date: Mon Nov  7 12:59:49 2011
New Revision: 143989

URL: http://llvm.org/viewvc/llvm-project?rev=143989&view=rev
Log:
Make the type of shift amount i32 in order to reduce the number of shift
instruction definitions.


Modified:
    llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
    llvm/trunk/lib/Target/Mips/MipsISelLowering.h
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td?rev=143989&r1=143988&r2=143989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td Mon Nov  7 12:59:49 2011
@@ -32,7 +32,7 @@
 def immZExt5_64 : ImmLeaf<i64, [{return Imm == (Imm & 0x1f);}]>;
 
 // imm32_63 predicate - True if imm is in range [32, 63].
-def imm32_63 : ImmLeaf<i64,
+def imm32_63 : ImmLeaf<i32,
                        [{return (int32_t)Imm >= 32 && (int32_t)Imm < 64;}],
                        Subtract32>;
 
@@ -43,12 +43,12 @@
 // 64-bit shift instructions.
 class shift_rotate_imm64<bits<6> func, bits<5> isRotate, string instr_asm,
                          SDNode OpNode>:
-  shift_rotate_imm<func, isRotate, instr_asm, OpNode, immZExt5_64, shamt_64,
+  shift_rotate_imm<func, isRotate, instr_asm, OpNode, immZExt5, shamt,
                    CPU64Regs>;
 
 class shift_rotate_imm64_32<bits<6> func, bits<5> isRotate, string instr_asm,
                             SDNode OpNode>:
-  shift_rotate_imm<func, isRotate, instr_asm, OpNode, imm32_63, shamt_64,
+  shift_rotate_imm<func, isRotate, instr_asm, OpNode, imm32_63, shamt,
                    CPU64Regs>;
 
 // Mul, Div

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=143989&r1=143988&r2=143989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Mon Nov  7 12:59:49 2011
@@ -98,6 +98,8 @@
   public:
     explicit MipsTargetLowering(MipsTargetMachine &TM);
 
+    virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
+
     virtual bool allowsUnalignedMemoryAccesses (EVT VT) const;
 
     /// LowerOperation - Provide custom lowering hooks for some operations.

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=143989&r1=143988&r2=143989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Mon Nov  7 12:59:49 2011
@@ -327,9 +327,9 @@
 
 class shift_rotate_reg<bits<6> func, bits<5> isRotate, string instr_asm,
                        SDNode OpNode, RegisterClass RC>:
-  FR<0x00, func, (outs RC:$rd), (ins RC:$rs, RC:$rt),
+  FR<0x00, func, (outs RC:$rd), (ins CPURegs:$rs, RC:$rt),
      !strconcat(instr_asm, "\t$rd, $rt, $rs"),
-     [(set RC:$rd, (OpNode RC:$rt, RC:$rs))], IIAlu> {
+     [(set RC:$rd, (OpNode RC:$rt, CPURegs:$rs))], IIAlu> {
   let shamt = isRotate;
 }