[llvm-commits] [llvm] r139714 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb2-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Wed Sep 14 14:12:11 2011
New Revision: 139714

URL: http://llvm.org/viewvc/llvm-project?rev=139714&view=rev
Log:
Thumb2 assembly parsing for MOV in IT block.

Select the right 16 vs. 32 bit encoding in an IT block.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=139714&r1=139713&r2=139714&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Sep 14 14:12:11 2011
@@ -3806,8 +3806,9 @@
     // request the 32-bit variant, transform it here.
     if (isARMLowRegister(Inst.getOperand(0).getReg()) &&
         Inst.getOperand(1).getImm() <= 255 &&
-        Inst.getOperand(2).getImm() == ARMCC::AL &&
-        Inst.getOperand(4).getReg() == ARM::CPSR &&
+        ((!inITBlock() && Inst.getOperand(2).getImm() == ARMCC::AL &&
+         Inst.getOperand(4).getReg() == ARM::CPSR) ||
+        (inITBlock() && Inst.getOperand(4).getReg() == 0)) &&
         (!static_cast<ARMOperand*>(Operands[2])->isToken() ||
          static_cast<ARMOperand*>(Operands[2])->getToken() != ".w")) {
       // The operands aren't in the same order for tMOVi8...

Modified: llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s?rev=139714&r1=139713&r2=139714&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb2-instructions.s Wed Sep 14 14:12:11 2011
@@ -1009,6 +1009,10 @@
         mov.w r0, #0x3fc0000
         mov r0, #0x3fc0000
         movs.w r0, #0x3fc0000
+        itte eq
+        movseq r1, #12
+        moveq r1, #12
+        movne.w r1, #12
 
 @ CHECK: movs	r1, #21                 @ encoding: [0x15,0x21]
 @ CHECK: movs.w	r1, #21                 @ encoding: [0x5f,0xf0,0x15,0x01]
@@ -1019,6 +1023,11 @@
 @ CHECK: mov.w	r0, #66846720           @ encoding: [0x4f,0xf0,0x7f,0x70]
 @ CHECK: mov.w	r0, #66846720           @ encoding: [0x4f,0xf0,0x7f,0x70]
 @ CHECK: movs.w	r0, #66846720           @ encoding: [0x5f,0xf0,0x7f,0x70]
+@ CHECK: itte	eq                      @ encoding: [0x06,0xbf]
+@ CHECK: movseq.w	r1, #12         @ encoding: [0x5f,0xf0,0x0c,0x01]
+@ CHECK: moveq	r1, #12                 @ encoding: [0x0c,0x21]
+@ CHECK: movne.w r1, #12                @ encoding: [0x4f,0xf0,0x0c,0x01]
+
 
 
 @------------------------------------------------------------------------------