[llvm-commits] [llvm] r138345 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb-instructions.s test/MC/ARM/thumb-diagnostics.s

[Jim Grosbach]

Author: grosbach
Date: Tue Aug 23 13:15:37 2011
New Revision: 138345

URL: http://llvm.org/viewvc/llvm-project?rev=138345&view=rev
Log:
Thumb parsing and encoding for STM.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
    llvm/trunk/test/MC/ARM/thumb-diagnostics.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=138345&r1=138344&r2=138345&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Tue Aug 23 13:15:37 2011
@@ -3149,6 +3149,13 @@
                    "registers must be in range r0-r7 or lr");
     break;
   }
+  case ARM::tSTMIA_UPD: {
+    bool listContainsBase;
+    if (checkLowRegisterList(Inst, 3, 0, 0, listContainsBase))
+      return Error(Operands[4]->getStartLoc(),
+                   "registers must be in range r0-r7");
+    break;
+  }
   }
 
   return false;

Modified: llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb-instructions.s?rev=138345&r1=138344&r2=138345&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-thumb-instructions.s Tue Aug 23 13:15:37 2011
@@ -425,3 +425,13 @@
 
 @ CHECK: setend	be                      @ encoding: [0x58,0xb6]
 @ CHECK: setend	le                      @ encoding: [0x50,0xb6]
+
+
+ at ------------------------------------------------------------------------------
+@ STM
+ at ------------------------------------------------------------------------------
+        stm r1!, {r2, r6}
+        stm r1!, {r1, r2, r3, r7}
+
+@ CHECK: stm	r1!, {r2, r6}           @ encoding: [0x44,0xc1]
+@ CHECK: stm	r1!, {r1, r2, r3, r7}   @ encoding: [0x8e,0xc1]

Modified: llvm/trunk/test/MC/ARM/thumb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-diagnostics.s?rev=138345&r1=138344&r2=138345&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-diagnostics.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-diagnostics.s Tue Aug 23 13:15:37 2011
@@ -68,6 +68,15 @@
 @ CHECK-ERRORS:              ^
 
 
+@ Invalid writeback and register lists for STM
+        stm r1, {r2, r6}
+        stm r1!, {r2, r9}
+@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
+@ CHECK-ERRORS:         stm r1, {r2, r6}
+@ CHECK-ERRORS:         ^
+@ CHECK-ERRORS: error: registers must be in range r0-r7
+@ CHECK-ERRORS:         stm r1!, {r2, r9}
+@ CHECK-ERRORS:                  ^
 
 @ Out of range immediates for LSL instruction.
         lsls r4, r5, #-1