[llvm-commits] [llvm] r138337 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/MC/Disassembler/ARM/thumb-tests.txt
Owen Anderson
resistor at mac.com
Tue Aug 23 10:37:32 PDT 2011
Author: resistor
Date: Tue Aug 23 12:37:32 2011
New Revision: 138337
URL: http://llvm.org/viewvc/llvm-project?rev=138337&view=rev
Log:
Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=138337&r1=138336&r2=138337&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Aug 23 12:37:32 2011
@@ -809,9 +809,9 @@
}
// register
def rr : T2TwoRegCmp<
- (outs), (ins GPR:$lhs, rGPR:$rhs), iir,
- opc, ".w\t$lhs, $rhs",
- [(opnode GPR:$lhs, rGPR:$rhs)]> {
+ (outs), (ins GPR:$Rn, rGPR:$Rm), iir,
+ opc, ".w\t$Rn, $Rm",
+ [(opnode GPR:$Rn, rGPR:$Rm)]> {
let Inst{31-27} = 0b11101;
let Inst{26-25} = 0b01;
let Inst{24-21} = opcod;
@@ -1001,9 +1001,9 @@
// UXTB16 - Requres T2ExtractPack, does not need the .w qualifier.
class T2I_ext_rrot_uxtb16<bits<3> opcod, string opc, PatFrag opnode>
- : T2TwoReg<(outs rGPR:$dst), (ins rGPR:$Rm, rot_imm:$rot),
- IIC_iEXTr, opc, "\t$dst, $Rm$rot",
- [(set rGPR:$dst, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
+ : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot),
+ IIC_iEXTr, opc, "\t$Rd, $Rm$rot",
+ [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>,
Requires<[HasT2ExtractPack, IsThumb2]> {
bits<2> rot;
let Inst{31-27} = 0b11111;
Modified: llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt?rev=138337&r1=138336&r2=138337&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/thumb-tests.txt Tue Aug 23 12:37:32 2011
@@ -286,3 +286,9 @@
# CHECK: smlad r5, r12, r8, r11
0x2c 0xfb 0x8 0xb5
+
+# CHECK: teq.w r0, r11
+0x90 0xea 0xb 0x8f
+
+# CHECK: uxtb16 r9, r12, ror #16
+0x3f 0xfa 0xec 0xf9
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