[llvm-commits] [llvm] r137313 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Nadav Rotem
nadav.rotem at intel.com
Thu Aug 11 10:05:47 PDT 2011
Author: nadav
Date: Thu Aug 11 12:05:47 2011
New Revision: 137313
URL: http://llvm.org/viewvc/llvm-project?rev=137313&view=rev
Log:
Add a comment, per Bruno's CR.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=137313&r1=137312&r2=137313&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 11 12:05:47 2011
@@ -12593,6 +12593,9 @@
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
// If we are saving a concatination of two XMM registers, perform two stores.
+ // This is better in Sandy Bridge cause one 256-bit mem op is done via two
+ // 128-bit ones. If in the future the cost becomes only one memory access the
+ // first version would be better.
if (VT.getSizeInBits() == 256 &&
StoredVal.getNode()->getOpcode() == ISD::CONCAT_VECTORS &&
StoredVal.getNumOperands() == 2) {
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