[llvm-commits] [PATCH] Add Pattern ID Information

[David A. Greene]

Bruno Cardoso Lopes <bruno.cardoso at gmail.com> writes:

>> It doesn't bloat.  It reduces.
>
> Regarding tablegen files, If it doesn't make the code really hard to
> read and understand (as in using black magic lisp-like tablegen
> constructs) I don't have objections at all. But regarding x86 specific
> lowering code, I think is a bad ideia to write code trying to support
> wider than 256-bit for now, for that I think we should wait the next
> wider ISA to come.

Oh, I absolutely agree.  I'm not talking about adding more than 256-bit
to the lowering parts.  I'm talking about TableGen patterns.

And some of the low-level TableGen classes will be using some more
advanced TableGen constructs to hide complexity.  Think code
factorization and abstraction.  But this will all go through review and
be adjusted, of course.

The goal is to make the specification really simple and as clear as
possible at the highest level (where most new patterns will be added)
and keep the complexity in a set of reusable lower-level classes.

>> And it's not a forecast.  This stuff is well-known already.  It's here
>> today.  Look at how similar AVX is to SSE and how similar SSE is to MMX.
>> There's tons of redundancy in the existing specification.  It's
>> non-orthogonal and cumbersome to maintain.
>
> x86 is pretty weird, I wouldn't rely 100% on it.

But I'm not even speculating.  I'm talking about what's there today.

AVX2 looks like AVX which looks like SSE which looks like MMX.  That's a
pretty strong track record.  :)

                               -Dave