[llvm-commits] [llvm] r135109 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/arm_instructions.s test/MC/ARM/basic-arm-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Wed Jul 13 18:40:38 2011
New Revision: 135109

URL: http://llvm.org/viewvc/llvm-project?rev=135109&view=rev
Log:
ARM Assembler support for DMB instruction.

Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".


Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/arm_instructions.s
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=135109&r1=135108&r2=135109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Jul 13 18:40:38 2011
@@ -3304,6 +3304,8 @@
 }
 }
 
+def : InstAlias<"dmb", (DMB 0xf)>;
+
 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
                 "dsb", "\t$opt", []>,
                 Requires<[IsARM, HasDB]> {

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=135109&r1=135108&r2=135109&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Jul 13 18:40:38 2011
@@ -1343,10 +1343,14 @@
   unsigned Opt = StringSwitch<unsigned>(OptStr.slice(0, OptStr.size()))
     .Case("sy",    ARM_MB::SY)
     .Case("st",    ARM_MB::ST)
+    .Case("sh",    ARM_MB::ISH)
     .Case("ish",   ARM_MB::ISH)
+    .Case("shst",  ARM_MB::ISHST)
     .Case("ishst", ARM_MB::ISHST)
     .Case("nsh",   ARM_MB::NSH)
+    .Case("un",    ARM_MB::NSH)
     .Case("nshst", ARM_MB::NSHST)
+    .Case("unst",  ARM_MB::NSHST)
     .Case("osh",   ARM_MB::OSH)
     .Case("oshst", ARM_MB::OSHST)
     .Default(~0U);

Modified: llvm/trunk/test/MC/ARM/arm_instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_instructions.s?rev=135109&r1=135108&r2=135109&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/arm_instructions.s (original)
+++ llvm/trunk/test/MC/ARM/arm_instructions.s Wed Jul 13 18:40:38 2011
@@ -191,30 +191,6 @@
 @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
         nop
 
-@ CHECK: dmb  sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
-        dmb  sy
-
-@ CHECK: dmb  st @ encoding: [0x5e,0xf0,0x7f,0xf5]
-        dmb  st
-
-@ CHECK: dmb  ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
-        dmb  ish
-
-@ CHECK: dmb  ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
-        dmb  ishst
-
-@ CHECK: dmb  nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
-        dmb  nsh
-
-@ CHECK: dmb  nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
-        dmb  nshst
-
-@ CHECK: dmb  osh @ encoding: [0x53,0xf0,0x7f,0xf5]
-        dmb  osh
-
-@ CHECK: dmb  oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
-        dmb  oshst
-
 @ CHECK: dsb  sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
         dsb  sy
 

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=135109&r1=135108&r2=135109&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Wed Jul 13 18:40:38 2011
@@ -458,3 +458,35 @@
 @ CHECK: dbg #0                         @ encoding: [0xf0,0xf0,0x20,0xe3]
 @ CHECK: dbg #5                         @ encoding: [0xf5,0xf0,0x20,0xe3]
 @ CHECK: dbg #15                        @ encoding: [0xff,0xf0,0x20,0xe3]
+
+
+ at ------------------------------------------------------------------------------
+@ DMB
+ at ------------------------------------------------------------------------------
+  dmb sy
+  dmb st
+  dmb sh
+  dmb ish
+  dmb shst
+  dmb ishst
+  dmb un
+  dmb nsh
+  dmb unst
+  dmb nshst
+  dmb osh
+  dmb oshst
+  dmb
+
+@ CHECK: dmb	sy                      @ encoding: [0x5f,0xf0,0x7f,0xf5]
+@ CHECK: dmb	st                      @ encoding: [0x5e,0xf0,0x7f,0xf5]
+@ CHECK: dmb	ish                     @ encoding: [0x5b,0xf0,0x7f,0xf5]
+@ CHECK: dmb	ish                     @ encoding: [0x5b,0xf0,0x7f,0xf5]
+@ CHECK: dmb	ishst                   @ encoding: [0x5a,0xf0,0x7f,0xf5]
+@ CHECK: dmb	ishst                   @ encoding: [0x5a,0xf0,0x7f,0xf5]
+@ CHECK: dmb	nsh                     @ encoding: [0x57,0xf0,0x7f,0xf5]
+@ CHECK: dmb	nsh                     @ encoding: [0x57,0xf0,0x7f,0xf5]
+@ CHECK: dmb	nshst                   @ encoding: [0x56,0xf0,0x7f,0xf5]
+@ CHECK: dmb	nshst                   @ encoding: [0x56,0xf0,0x7f,0xf5]
+@ CHECK: dmb	osh                     @ encoding: [0x53,0xf0,0x7f,0xf5]
+@ CHECK: dmb	oshst                   @ encoding: [0x52,0xf0,0x7f,0xf5]
+@ CHECK: dmb	sy                      @ encoding: [0x5f,0xf0,0x7f,0xf5]