[llvm-commits] [llvm] r135107 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Jim Grosbach]

Author: grosbach
Date: Wed Jul 13 18:33:10 2011
New Revision: 135107

URL: http://llvm.org/viewvc/llvm-project?rev=135107&view=rev
Log:
Update comments. These are for assembler, too.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=135107&r1=135106&r2=135107&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Jul 13 18:33:10 2011
@@ -3305,15 +3305,14 @@
 }
 
 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
-                "dsb", "\t$opt",
-                [/* For disassembly only; pattern left blank */]>,
+                "dsb", "\t$opt", []>,
                 Requires<[IsARM, HasDB]> {
   bits<4> opt;
   let Inst{31-4} = 0xf57ff04;
   let Inst{3-0} = opt;
 }
 
-// ISB has only full system option -- for disassembly only
+// ISB has only full system option
 def ISB : AInoP<(outs), (ins), MiscFrm, NoItinerary, "isb", "", []>,
                 Requires<[IsARM, HasDB]> {
   let Inst{31-4} = 0xf57ff06;