[llvm-commits] [llvm] r132340 - in /llvm/trunk: include/llvm/IntrinsicsXCore.td lib/Target/XCore/XCoreISelDAGToDAG.cpp lib/Target/XCore/XCoreInstrInfo.td test/CodeGen/XCore/misc-intrinsics.ll
Richard Osborne
richard at xmos.com
Tue May 31 09:24:50 PDT 2011
Author: friedgold
Date: Tue May 31 11:24:49 2011
New Revision: 132340
URL: http://llvm.org/viewvc/llvm-project?rev=132340&view=rev
Log:
Add XCore intrinsic for crc8.
Modified:
llvm/trunk/include/llvm/IntrinsicsXCore.td
llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll
Modified: llvm/trunk/include/llvm/IntrinsicsXCore.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsXCore.td?rev=132340&r1=132339&r2=132340&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsXCore.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsXCore.td Tue May 31 11:24:49 2011
@@ -11,6 +11,9 @@
let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
// Miscellaneous instructions.
def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
+ def int_xcore_crc8 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
+ [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],
+ [IntrNoMem]>;
def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrNoMem]>;
def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
Modified: llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp?rev=132340&r1=132339&r2=132340&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp Tue May 31 11:24:49 2011
@@ -205,6 +205,16 @@
return CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, MVT::i32,
Ops, 4);
}
+ case ISD::INTRINSIC_WO_CHAIN: {
+ unsigned IntNo = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
+ switch (IntNo) {
+ case Intrinsic::xcore_crc8:
+ SDValue Ops[] = { N->getOperand(1), N->getOperand(2), N->getOperand(3) };
+ return CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, MVT::i32,
+ Ops, 3);
+ }
+ break;
+ }
case ISD::BRIND:
if (SDNode *ResNode = SelectBRIND(N))
return ResNode;
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=132340&r1=132339&r2=132340&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Tue May 31 11:24:49 2011
@@ -504,6 +504,12 @@
[]>;
}
+let Constraints = "$src1 = $dst1" in
+def CRC8_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2),
+ (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+ "crc8 $dst1, $dst2, $src2, $src3",
+ []>;
+
// Five operand long
def LADD_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
Modified: llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll?rev=132340&r1=132339&r2=132340&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll Tue May 31 11:24:49 2011
@@ -1,6 +1,9 @@
; RUN: llc < %s -march=xcore | FileCheck %s
+%0 = type { i32, i32 }
+
declare i32 @llvm.xcore.bitrev(i32)
declare i32 @llvm.xcore.crc32(i32, i32, i32)
+declare %0 @llvm.xcore.crc8(i32, i32, i32)
define i32 @bitrev(i32 %val) {
; CHECK: bitrev:
@@ -15,3 +18,10 @@
%result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
ret i32 %result
}
+
+define %0 @crc8(i32 %crc, i32 %data, i32 %poly) {
+; CHECK: crc8:
+; CHECK: crc8 r0, r1, r1, r2
+ %result = call %0 @llvm.xcore.crc8(i32 %crc, i32 %data, i32 %poly)
+ ret %0 %result
+}
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