[llvm-commits] [llvm] r131705 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Jakob Stoklund Olesen
stoklund at 2pi.dk
Fri May 20 10:09:07 PDT 2011
On May 19, 2011, at 7:38 PM, Cameron Zwarich wrote:
> On May 19, 2011, at 5:46 PM, Jakob Stoklund Olesen wrote:
>
>> On May 19, 2011, at 4:44 PM, Cameron Zwarich wrote:
>>
>>> Author: zwarich
>>> Date: Thu May 19 18:44:34 2011
>>> New Revision: 131705
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=131705&view=rev
>>> Log:
>>> Fix PR9955 by only attaching load memory operands to load instructions and
>>> similarly for stores. Now "make check" passes with the MachineVerifier forced
>>> on with the VerifyCoalescing option!
>>
>> Woot!
>>
>> Do you know how slow the verifier is compared to, say, register coalescing? It may be worthwhile to run at least one pass in +Asserts builds.
>
> I haven't run any timings, partially since it doesn't run as a separate pass with VerifyCoalescing (we should probably change that). It's not yet ready to be turned on in +Asserts builds, since it has some failures on test-suite. Once it passes test-suite on x86 and ARM and survives a self-host, we should consider turning it on for +Asserts builds. We should also turn it on for all "make check" tests somehow.
This still finds a number of issues:
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 13cd45e..4049599 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -417,6 +417,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
if (addPreRegAlloc(PM, OptLevel))
printAndVerify(PM, "After PreRegAlloc passes");
+#ifndef NDEBUG
+ PM.add(createMachineVerifierPass("Before register allocation"));
+#endif
+
// Perform register allocation.
PM.add(createRegisterAllocator(OptLevel));
printAndVerify(PM, "After Register Allocation");
Failing Tests (20):
Clang :: CodeGenCXX/array-construction.cpp
Clang :: CodeGenCXX/constructor-for-array-members.cpp
Clang :: CodeGenCXX/ptr-to-member-function.cpp
Clang :: CodeGenObjC/debug-info-getter-name.m
Clang :: CodeGenObjC/instance-method-metadata.m
LLVM :: CodeGen/ARM/2010-08-04-StackVariable.ll
LLVM :: CodeGen/ARM/fast-isel-crash.ll
LLVM :: CodeGen/ARM/fast-isel-static.ll
LLVM :: CodeGen/ARM/fast-isel.ll
LLVM :: CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll
LLVM :: CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll
LLVM :: CodeGen/PowerPC/indirectbr.ll
LLVM :: CodeGen/Thumb2/2010-02-24-BigStack.ll
LLVM :: CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
LLVM :: CodeGen/X86/MachineSink-CritEdge.ll
LLVM :: CodeGen/X86/fast-isel-atomic.ll
LLVM :: CodeGen/X86/fast-isel-gep.ll
LLVM :: CodeGen/X86/fast-isel-x86-64.ll
LLVM :: CodeGen/X86/fold-mul-lohi.ll
LLVM :: CodeGen/X86/sext-subreg.ll
Running just one pass of verification is a bit slow, though:
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
163.6872 ( 84.1%) 2.6591 ( 57.1%) 166.3463 ( 83.4%) 166.3893 ( 83.4%) Verify generated machine code
15.0122 ( 7.7%) 1.3569 ( 29.1%) 16.3691 ( 8.2%) 16.3692 ( 8.2%) X86 DAG->DAG Instruction Selection
2.5570 ( 1.3%) 0.0163 ( 0.4%) 2.5733 ( 1.3%) 2.5729 ( 1.3%) Live Variable Analysis
2.4707 ( 1.3%) 0.0117 ( 0.3%) 2.4824 ( 1.2%) 2.4823 ( 1.2%) Eliminate PHI nodes for register allocation
2.1927 ( 1.1%) 0.0901 ( 1.9%) 2.2829 ( 1.1%) 2.2829 ( 1.1%) Greedy Register Allocator
It makes isel look good!
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