[llvm-commits] [llvm] r131519 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Cameron Zwarich]

Author: zwarich
Date: Tue May 17 21:29:50 2011
New Revision: 131519

URL: http://llvm.org/viewvc/llvm-project?rev=131519&view=rev
Log:
Fix typo.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=131519&r1=131518&r2=131519&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue May 17 21:29:50 2011
@@ -4866,13 +4866,13 @@
 
   MachineRegisterInfo &MRI = BB->getParent()->getRegInfo();
   unsigned scratch =
-    MRI.createVirtualRegister(isThumb2 ? ARM::tGPRRegisterClass
+    MRI.createVirtualRegister(isThumb2 ? ARM::rGPRRegisterClass
                                        : ARM::GPRRegisterClass);
 
   if (isThumb2) {
-    MRI.constrainRegClass(dest, ARM::tGPRRegisterClass);
-    MRI.constrainRegClass(oldval, ARM::tGPRRegisterClass);
-    MRI.constrainRegClass(newval, ARM::tGPRRegisterClass);
+    MRI.constrainRegClass(dest, ARM::rGPRRegisterClass);
+    MRI.constrainRegClass(oldval, ARM::rGPRRegisterClass);
+    MRI.constrainRegClass(newval, ARM::rGPRRegisterClass);
   }
 
   unsigned ldrOpc, strOpc;