[llvm-commits] [PATCH] Initial work on vector-select and modified type legalization
Rotem, Nadav
nadav.rotem at intel.com
Thu May 5 06:47:30 PDT 2011
Hi,
I started working on implementing vector select in LLVM. Codegen support for vector-select is very important for vectorizing compilers. I followed Duncan's design proposal and implemented vector-integer promotion in the type-legalizer. This required changes all over the codegen. The work is not complete and there are several bugs and missing features, but I am now able to compile the basic vector-select code below. Almost all of the LIT tests pass and a good number of vectorized programs run successfully.
This is a big patch and I would like other LLVM developers to go over it and review it.
Thanks,
Nadav
define <4 x float> @vector_code(<4 x i64> %A, <4 x i64> %B, <4 x float> %R0, <4 x float> %R1 ) {
%C = icmp eq <4 x i64> %A, %B
%K = xor <4 x i1> <i1 1, i1 1, i1 1, i1 1>, %C
%D = select <4 x i1> %K, <4 x float> %R1, <4 x float> %R0
ret <4 x float> %D
}
pcmpeqq XMM1, XMM3
pcmpeqq XMM0, XMM2
shufps XMM0, XMM1, -120
xorps XMM0, XMMWORD PTR [LCPI0_0]
pslld XMM0, 31
movdqa XMM1, XMMWORD PTR [ESP + 4]
movdqa XMM2, XMMWORD PTR [ESP + 20]
blendvps XMM2, XMM1, %xmm0
movdqa XMM0, XMM2
ret
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