[llvm-commits] [PATCH] TargetLowering::isLoadWidthReducible()

[Ken Dyck]

The DSP that my back end targets has multiple address spaces. From
most of the address spaces, it is possible to load a 'small' integer
with a single instruction. But one address space can only load a
'large' integer in a single instruction. For that last address space,
I would like to custom lower 'small' loads to 'large' ones, then
truncate the result. But when I do, DAGCombiner detects the truncate
of a load, which it assumes can be reduced to a 'small' load,
effectively undoing the lowering operation.

The attached patch adds a hook to TargetLowering,
isLoadWidthReducible(), that allows back ends to stop the DAG combiner
before it reduces the size of a load in ReduceLoadWidth(). Would there
be any interest in applying it?

-Ken
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