[llvm-commits] [llvm] r123892 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
Andrew Trick
atrick at apple.com
Tue Jan 25 13:59:37 PST 2011
On Jan 25, 2011, at 1:48 PM, Bill Wendling wrote:
> On Jan 19, 2011, at 10:21 PM, Andrew Trick wrote:
>> if (!PN->isMachineOpcode()) {
>> @@ -1814,7 +1826,9 @@
>> if (I->isCtrl())
>> continue;
>> SUnit *PredSU = I->getSUnit();
>> - if (PredSU->NumSuccsLeft != PredSU->NumSuccs)
>> + // NumSuccsLeft counts all deps. Don't compare it with NumSuccs which only
>> + // counts data deps.
>> + if (PredSU->NumSuccsLeft != PredSU->Succs.size())
>> continue;
>> const SDNode *PN = PredSU->getNode();
>> if (!PN->isMachineOpcode()) {
>> @@ -2003,12 +2017,11 @@
>> int LDepth = (int)left->getDepth();
>> int RDepth = (int)right->getDepth();
>>
>> - DEBUG(dbgs() << " Comparing latency of SU #" << left->NodeNum
>> - << " depth " << LDepth << " vs SU #" << right->NodeNum
>> - << " depth " << RDepth << "\n");
>> -
>> if (EnableSchedCycles) {
>> if (LDepth != RDepth)
>> + DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum
>> + << ") depth " << LDepth << " vs SU (" << right->NodeNum
>> + << ") depth " << RDepth << ")\n");
>> return LDepth < RDepth ? 1 : -1;
>
> Hi Andy,
>
> Did you mean to move the return statement out of that if-statement?
>
> -bw
>
I did in the next commit. Thanks for checking though.
-Andy
>> }
>> else {
>> @@ -2119,10 +2132,16 @@
>> bool RHigh = SPQ->HighRegPressure(right);
>> // Avoid causing spills. If register pressure is high, schedule for
>> // register pressure reduction.
>> - if (LHigh && !RHigh)
>> + if (LHigh && !RHigh) {
>> + DEBUG(dbgs() << " pressure SU(" << left->NodeNum << ") > SU("
>> + << right->NodeNum << ")\n");
>> return true;
>> - else if (!LHigh && RHigh)
>> + }
>> + else if (!LHigh && RHigh) {
>> + DEBUG(dbgs() << " pressure SU(" << right->NodeNum << ") > SU("
>> + << left->NodeNum << ")\n");
>> return false;
>> + }
>> else if (!LHigh && !RHigh) {
>> int result = BUCompareLatency(left, right, true /*checkPref*/, SPQ);
>> if (result != 0)
>>
>>
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>
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