[llvm-commits] [llvm] r119308 - /llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp
Chris Lattner
sabre at nondot.org
Mon Nov 15 16:57:32 PST 2010
Author: lattner
Date: Mon Nov 15 18:57:32 2010
New Revision: 119308
URL: http://llvm.org/viewvc/llvm-project?rev=119308&view=rev
Log:
add copy of comment to the code that will survive the mcjit'ization
Modified:
llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp?rev=119308&r1=119307&r2=119308&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCMCCodeEmitter.cpp Mon Nov 15 18:57:32 2010
@@ -199,6 +199,8 @@
getMachineOpValue(const MCInst &MI, const MCOperand &MO,
SmallVectorImpl<MCFixup> &Fixups) const {
if (MO.isReg()) {
+ // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand.
+ // The GPR operand should come through here though.
assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) ||
MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
return PPCRegisterInfo::getRegisterNumbering(MO.getReg());
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