[llvm-commits] [llvm] r118465 - in /llvm/trunk: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/complex-asm.ll

[Dale Johannesen]

Author: johannes
Date: Mon Nov  8 19:15:07 2010
New Revision: 118465

URL: http://llvm.org/viewvc/llvm-project?rev=118465&view=rev
Log:
Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.


Added:
    llvm/trunk/test/CodeGen/X86/complex-asm.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=118465&r1=118464&r2=118465&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Nov  8 19:15:07 2010
@@ -2738,7 +2738,8 @@
         case 32:
         case 64:
         case 128:
-          OpTy = IntegerType::get(OpTy->getContext(), BitSize);
+          OpInfo.ConstraintVT =
+              EVT::getEVT(IntegerType::get(OpTy->getContext(), BitSize), true);
           break;
         }
       } else if (dyn_cast<PointerType>(OpTy)) {

Added: llvm/trunk/test/CodeGen/X86/complex-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/complex-asm.ll?rev=118465&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/complex-asm.ll (added)
+++ llvm/trunk/test/CodeGen/X86/complex-asm.ll Mon Nov  8 19:15:07 2010
@@ -0,0 +1,17 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; This formerly crashed.
+
+%0 = type { i64, i64 }
+
+define %0 @f() nounwind ssp {
+entry:
+  %v = alloca %0, align 8
+  call void asm sideeffect "", "=*r,r,r,0,~{dirflag},~{fpsr},~{flags}"(%0* %v, i32 0, i32 1, i128 undef) nounwind
+  %0 = getelementptr inbounds %0* %v, i64 0, i32 0
+  %1 = load i64* %0, align 8
+  %2 = getelementptr inbounds %0* %v, i64 0, i32 1
+  %3 = load i64* %2, align 8
+  %mrv4 = insertvalue %0 undef, i64 %1, 0
+  %mrv5 = insertvalue %0 %mrv4, i64 %3, 1
+  ret %0 %mrv5
+}