[llvm-commits] [llvm] r113670 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h

[Bill Wendling]

On Sep 13, 2010, at 3:27 AM, Gabor Greif wrote:

>> If you want to use the result of AND instead of TST in the Bcc, you'll need to say that AND implicitly defines CSPR. In the above case, it looks like the AND is basically dead (at least in this code snippet). The TST performs an "and" of the 3 to the result of LDR, which is what the AND instruction does. The only difference here is that TST sets CPSR and the AND doesn't.
> 
> I thought the point of your patch is to visit all "cmp r, #0" and "tst
> r" instructions and when they act on a register that is defined by an
> instruction that has a form to set CPSR, you switch to that form. This
> allows you to elide the "tst" rsp. "cmp". Did I get it right?
> 
Yup. That's the basic idea. There are other more complex optimizations that I'd like to do, but that's one of the easiest changes.

-bw