[llvm-commits] [llvm] r113670 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
Gabor Greif
ggreif at gmail.com
Sat Sep 11 00:49:06 PDT 2010
Bill,
you might be interested in my dabbling attempts
with http://llvm.org/bugs/show_bug.cgi?id=8125
The x86 peephole already manages to eliminate
the test after the 'and', It would be interesting
to see whether ARM does too.
Btw., my commit is not really restricted to 'and',
any operation that sets the zero flag will do.
A.t.m. (before your changes) I got:
LBB0_1: @ %tailrecurse
@ =>This Inner Loop Header:
Depth=1
ldr lr, [r2, #-4]
and r4, lr, #3
tst lr, #3
beq LBB0_4
from the transformed IR:
#########################################
gabor at google7:~/llvm-build$ Debug+Asserts/bin/llc -print-
after=codegenprepare -mtriple=arm-apple-darwin < /home/gabor/llvm/test/
CodeGen/X86/switch-and.ll
.syntax unified
*** IR Dump After Optimize for code generation ***
%struct.Foo = type { i8* }
define %struct.Foo* @_ZN3Foo7collectEj(%struct.Foo* %this, i32 %acc)
nounwind readonly align 2 {
entry:
%scevgep = getelementptr %struct.Foo* %this, i32 1 ; <%struct.Foo*>
[#uses=1]
br label %tailrecurse
tailrecurse: ; preds = %sw.bb,
%entry
%lsr.iv4 = phi %struct.Foo* [ %scevgep5, %sw.bb ], [ %scevgep,
%entry ] ; <%struct.Foo*> [#uses=3]
%lsr.iv = phi i64 [ %lsr.iv.next, %sw.bb ], [ 1, %entry ] ; <i64>
[#uses=2]
%acc.tr = phi i32 [ %or, %sw.bb ], [ %acc, %entry ] ; <i32>
[#uses=2]
%lsr.iv46 = bitcast %struct.Foo* %lsr.iv4 to i8** ; <i8**> [#uses=1]
%scevgep7 = getelementptr i8** %lsr.iv46, i32 -1 ; <i8**> [#uses=1]
%tmp2 = load i8** %scevgep7, align 8 ; <i8*> [#uses=1]
%0 = ptrtoint i8* %tmp2 to i64 ; <i64> [#uses=1]
%and = and i64 %0, 3 ; <i64> [#uses=1]
%conv = trunc i64 %and to i32 ; <i32> [#uses=3]
%tst = icmp eq i32 %conv, 0 ; <i1> [#uses=1]
br i1 %tst, label %sw.bb, label %tailrecurse.switch
tailrecurse.switch: ; preds =
%tailrecurse
switch i32 %conv, label %sw.epilog [
i32 1, label %sw.bb
i32 3, label %sw.bb6
i32 2, label %sw.bb8
]
sw.bb: ; preds =
%tailrecurse.switch, %tailrecurse
%shl = shl i32 %acc.tr, 1 ; <i32> [#uses=1]
%or = or i32 %conv, %shl ; <i32> [#uses=1]
%lsr.iv.next = add i64 %lsr.iv, 1 ; <i64> [#uses=1]
%scevgep5 = getelementptr %struct.Foo* %lsr.iv4, i32 1 ; <
%struct.Foo*> [#uses=1]
br label %tailrecurse
sw.bb6: ; preds =
%tailrecurse.switch
ret %struct.Foo* %lsr.iv4
sw.bb8: ; preds =
%tailrecurse.switch
%tmp1 = zext i32 %acc.tr to i64 ; <i64> [#uses=1]
%tmp3 = add i64 %tmp1, %lsr.iv ; <i64> [#uses=1]
%add.ptr11 = getelementptr inbounds %struct.Foo* %this, i64 %tmp3 ; <
%struct.Foo*> [#uses=1]
ret %struct.Foo* %add.ptr11
sw.epilog: ; preds =
%tailrecurse.switch
ret %struct.Foo* undef
}
#########################################
Cheers,
Gabor
On 11 Sep., 02:13, Bill Wendling <isanb... at gmail.com> wrote:
> Author: void
> Date: Fri Sep 10 19:13:50 2010
> New Revision: 113670
>
> URL:http://llvm.org/viewvc/llvm-project?rev=113670&view=rev
> Log:
> Rename ConvertToSetZeroFlag to something more general.
>
> Modified:
> llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
>
> Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> URL:http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Ta...
> =========================================================================== ===
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Fri Sep 10 19:13:50 2010
> @@ -585,10 +585,11 @@
> return false;
> }
>
> - /// ConvertToSetZeroFlag - Convert the instruction supplying the argument to
> - /// the comparison into one that sets the zero bit in the flags
> - /// register. Update the iterator *only* if a transformation took place.
> - virtual bool ConvertToSetZeroFlag(MachineInstr * /*CmpInstr*/,
> + /// OptimizeCompareInstr - See if the comparison instruction can be converted
> + /// into something more efficient. E.g., on ARM most instructions can set the
> + /// flags register, obviating the need for a separate CMP. Update the iterator
> + /// *only* if a transformation took place.
> + virtual bool OptimizeCompareInstr(MachineInstr * /*CmpInstr*/,
> unsigned /*SrcReg*/, int /*CmpValue*/,
> MachineBasicBlock::iterator &) const {
> return false;
>
> Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
> URL:http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOp...
> =========================================================================== ===
> --- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Fri Sep 10 19:13:50 2010
> @@ -243,8 +243,8 @@
> TargetRegisterInfo::isPhysicalRegister(SrcReg))
> return false;
>
> - // Attempt to convert the defining instruction to set the "zero" flag.
> - if (TII->ConvertToSetZeroFlag(MI, SrcReg, CmpValue, NextIter)) {
> + // Attempt to optimize the comparison instruction.
> + if (TII->OptimizeCompareInstr(MI, SrcReg, CmpValue, NextIter)) {
> ++NumEliminated;
> return true;
> }
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL:http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBase...
> =========================================================================== ===
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Sep 10 19:13:50 2010
> @@ -1377,11 +1377,11 @@
> return false;
> }
>
> -/// ConvertToSetZeroFlag - Convert the instruction supplying the argument to the
> +/// OptimizeCompareInstr - Convert the instruction supplying the argument to the
> /// comparison into one that sets the zero bit in the flags register. Update the
> /// iterator *only* if a transformation took place.
> bool ARMBaseInstrInfo::
> -ConvertToSetZeroFlag(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue,
> +OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue,
> MachineBasicBlock::iterator &MII) const {
> if (CmpValue != 0)
> return false;
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
> URL:http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBase...
> =========================================================================== ===
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Fri Sep 10 19:13:50 2010
> @@ -344,9 +344,9 @@
> virtual bool AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg,
> int &CmpValue) const;
>
> - /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so
> + /// OptimizeCompareInstr - Convert the instruction to set the zero flag so
> /// that we can remove a "comparison with zero".
> - virtual bool ConvertToSetZeroFlag(MachineInstr *CmpInstr, unsigned SrcReg,
> + virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
> int CmpValue,
> MachineBasicBlock::iterator &MII) const;
>
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