[llvm-commits] [llvm] r112799 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86InstrSSE.td

Bruno Cardoso Lopes bruno.cardoso at gmail.com
Wed Sep 1 19:35:52 PDT 2010


Author: bruno
Date: Wed Sep  1 21:35:51 2010
New Revision: 112799

URL: http://llvm.org/viewvc/llvm-project?rev=112799&view=rev
Log:
become more strict about when it's safe to use X86ISD::MOVLPS

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112799&r1=112798&r2=112799&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Sep  1 21:35:51 2010
@@ -5082,10 +5082,10 @@
   SDValue TmpV1 = V1;
   SDValue TmpV2 = V2;
 
-  // Trivial case, when V2 is a load.
-  if (TmpV2.getOpcode() == ISD::BIT_CONVERT)
+  // Trivial case, when V2 comes from a load.
+  if (TmpV2.hasOneUse() && TmpV2.getOpcode() == ISD::BIT_CONVERT)
     TmpV2 = TmpV2.getOperand(0);
-  if (TmpV2.getOpcode() == ISD::SCALAR_TO_VECTOR)
+  if (TmpV2.hasOneUse() && TmpV2.getOpcode() == ISD::SCALAR_TO_VECTOR)
     TmpV2 = TmpV2.getOperand(0);
   if (MayFoldLoad(TmpV2))
     CanFoldLoad = true;
@@ -5095,9 +5095,9 @@
   //    turns into:
   //  (MOVLPSmr addr:$src1, VR128:$src2)
   // So, recognize this potential and also use MOVLPS or MOVLPD
-  if (TmpV1.getOpcode() == ISD::BIT_CONVERT)
+  if (TmpV1.hasOneUse() && TmpV1.getOpcode() == ISD::BIT_CONVERT)
     TmpV1 = TmpV1.getOperand(0);
-  if (MayFoldLoad(TmpV1))
+  if (MayFoldLoad(TmpV1) && MayFoldIntoStore(Op))
     CanFoldLoad = true;
 
   if (CanFoldLoad) {

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=112799&r1=112798&r2=112799&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Sep  1 21:35:51 2010
@@ -5829,6 +5829,13 @@
 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
           (MOVSSrr (v4f32 VR128:$src1),
                    (EXTRACT_SUBREG (v4f32 VR128:$src2), sub_ss))>;
+// FIXME: Instead of a X86Movss there should be a X86Movlps here, the problem
+// is during lowering, where it's not possible to recognize the load fold cause
+// it has two uses through a bitcast. One use disappears at isel time and the
+// fold opportunity reappears.
+def : Pat<(X86Movss VR128:$src1,
+                    (bc_v4i32 (v2i64 (load addr:$src2)))),
+          (MOVLPSrm VR128:$src1, addr:$src2)>;
 
 // Shuffle with MOVSD
 def : Pat<(v2f64 (X86Movsd VR128:$src1, (scalar_to_vector FR64:$src2))),
@@ -5909,9 +5916,6 @@
 def : Pat<(X86Movlps VR128:$src1,
                     (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2))))),
           (MOVLPSrm VR128:$src1, addr:$src2)>;
-def : Pat<(X86Movlps VR128:$src1,
-                    (bc_v4i32 (v2i64 (load addr:$src2)))),
-          (MOVLPSrm VR128:$src1, addr:$src2)>;
 
 // Shuffle with MOVLPD
 def : Pat<(v2f64 (X86Movlpd VR128:$src1, (load addr:$src2))),





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